stats: Add power stats to test references

Change-Id: Ic827213134b199446822f128b81d4a480e777fee

2 files changed, 31 insertions, 10 deletions

diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt
index a92d8585c..044a8cac9 100644
--- a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt
@@ -4,15 +4,16 @@ sim_seconds                                  0.131393                       # Nu
 sim_ticks                                131393279000                       # Number of ticks simulated
 final_tick                               131393279000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 719836                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1206511                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              716141111                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 284280                       # Number of bytes of host memory used
-host_seconds                                   183.47                       # Real time elapsed on the host
+host_inst_rate                                1595970                       # Simulator instruction rate (inst/s)
+host_op_rate                                  2674991                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             1587777431                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 331680                       # Number of bytes of host memory used
+host_seconds                                    82.75                       # Real time elapsed on the host
 sim_insts                                   132071193                       # Number of instructions simulated
 sim_ops                                     221363385                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
 system.clk_domain.clock                          1000                       # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED 131393279000                       # Cumulative time (in ticks) in various power states
 system.physmem.bytes_read::cpu.inst        1387954936                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data         310423752                       # Number of bytes read from this memory
 system.physmem.bytes_read::total           1698378688                       # Number of bytes read from this memory
@@ -35,9 +36,14 @@ system.physmem.bw_write::total              759720678                       # Wr
 system.physmem.bw_total::cpu.inst         10563363260                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data          3122274945                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total            13685638205                       # Total bandwidth to/from this memory (bytes/s)
+system.pwrStateResidencyTicks::UNDEFINED 131393279000                       # Cumulative time (in ticks) in various power states
 system.cpu_clk_domain.clock                       500                       # Clock period in ticks
+system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 131393279000                       # Cumulative time (in ticks) in various power states
 system.cpu.apic_clk_domain.clock                 8000                       # Clock period in ticks
+system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 131393279000                       # Cumulative time (in ticks) in various power states
+system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 131393279000                       # Cumulative time (in ticks) in various power states
 system.cpu.workload.num_syscalls                  400                       # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON    131393279000                       # Cumulative time (in ticks) in various power states
 system.cpu.numCycles                        262786559                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
@@ -98,6 +104,7 @@ system.cpu.op_class::MemWrite                20515717      9.27%    100.00% # Cl
 system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::total                  221363385                       # Class of executed instruction
+system.membus.pwrStateResidencyTicks::UNDEFINED 131393279000                       # Cumulative time (in ticks) in various power states
 system.membus.trans_dist::ReadReq           230176372                       # Transaction distribution
 system.membus.trans_dist::ReadResp          230176372                       # Transaction distribution
 system.membus.trans_dist::WriteReq           20515731                       # Transaction distribution
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
index cbc3cc2d9..42017c57f 100644
--- a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
@@ -4,15 +4,16 @@ sim_seconds                                  0.250987                       # Nu
 sim_ticks                                250987138500                       # Number of ticks simulated
 final_tick                               250987138500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 489633                       # Simulator instruction rate (inst/s)
-host_op_rate                                   820669                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              930494730                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 293244                       # Number of bytes of host memory used
-host_seconds                                   269.74                       # Real time elapsed on the host
+host_inst_rate                                1028477                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1723822                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             1954510825                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 341680                       # Number of bytes of host memory used
+host_seconds                                   128.41                       # Real time elapsed on the host
 sim_insts                                   132071193                       # Number of instructions simulated
 sim_ops                                     221363385                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
 system.clk_domain.clock                          1000                       # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.physmem.bytes_read::cpu.inst            181760                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data            121280                       # Number of bytes read from this memory
 system.physmem.bytes_read::total               303040                       # Number of bytes read from this memory
@@ -29,9 +30,14 @@ system.physmem.bw_inst_read::total             724181                       # In
 system.physmem.bw_total::cpu.inst              724181                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data              483212                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total                1207393                       # Total bandwidth to/from this memory (bytes/s)
+system.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu_clk_domain.clock                       500                       # Clock period in ticks
+system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.apic_clk_domain.clock                 8000                       # Clock period in ticks
+system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
+system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.workload.num_syscalls                  400                       # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON    250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.numCycles                        501974277                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
@@ -92,6 +98,7 @@ system.cpu.op_class::MemWrite                20515717      9.27%    100.00% # Cl
 system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::total                  221363385                       # Class of executed instruction
+system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.tags.replacements                41                       # number of replacements
 system.cpu.dcache.tags.tagsinuse          1363.414730                       # Cycle average of tags in use
 system.cpu.dcache.tags.total_refs            77195831                       # Total number of references to valid blocks.
@@ -110,6 +117,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::4         1328
 system.cpu.dcache.tags.occ_task_id_percent::1024     0.455078                       # Percentage of cache occupancy per task id
 system.cpu.dcache.tags.tag_accesses         154397377                       # Number of tag accesses
 system.cpu.dcache.tags.data_accesses        154397377                       # Number of data accesses
+system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.ReadReq_hits::cpu.data     56681678                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total        56681678                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data     20514153                       # number of WriteReq hits
@@ -198,6 +206,7 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 60745.144357
 system.cpu.dcache.demand_avg_mshr_miss_latency::total 60745.144357                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 60745.144357                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::total 60745.144357                       # average overall mshr miss latency
+system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.tags.replacements              2836                       # number of replacements
 system.cpu.icache.tags.tagsinuse          1455.245085                       # Cycle average of tags in use
 system.cpu.icache.tags.total_refs           173489673                       # Total number of references to valid blocks.
@@ -216,6 +225,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::4          869
 system.cpu.icache.tags.occ_task_id_percent::1024     0.907227                       # Percentage of cache occupancy per task id
 system.cpu.icache.tags.tag_accesses         346993428                       # Number of tag accesses
 system.cpu.icache.tags.data_accesses        346993428                       # Number of data accesses
+system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.ReadReq_hits::cpu.inst    173489673                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total       173489673                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst     173489673                       # number of demand (read+write) hits
@@ -284,6 +294,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 41657.115467
 system.cpu.icache.demand_avg_mshr_miss_latency::total 41657.115467                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 41657.115467                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::total 41657.115467                       # average overall mshr miss latency
+system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.tags.replacements                0                       # number of replacements
 system.cpu.l2cache.tags.tagsinuse         2058.105553                       # Cycle average of tags in use
 system.cpu.l2cache.tags.total_refs               4732                       # Total number of references to valid blocks.
@@ -306,6 +317,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::4         2064
 system.cpu.l2cache.tags.occ_task_id_percent::1024     0.096558                       # Percentage of cache occupancy per task id
 system.cpu.l2cache.tags.tag_accesses            80550                       # Number of tag accesses
 system.cpu.l2cache.tags.data_accesses           80550                       # Number of data accesses
+system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.WritebackDirty_hits::writebacks            7                       # number of WritebackDirty hits
 system.cpu.l2cache.WritebackDirty_hits::total            7                       # number of WritebackDirty hits
 system.cpu.l2cache.WritebackClean_hits::writebacks         2836                       # number of WritebackClean hits
@@ -446,6 +458,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0
 system.cpu.toL2Bus.snoop_filter.tot_snoops            0                       # Total number of snoops made to the snoop filter.
 system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
 system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.cpu.toL2Bus.trans_dist::ReadResp          5021                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::WritebackDirty            7                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::WritebackClean         2836                       # Transaction distribution
@@ -478,6 +491,7 @@ system.cpu.toL2Bus.respLayer0.occupancy       7041000                       # La
 system.cpu.toL2Bus.respLayer0.utilization          0.0                       # Layer utilization (%)
 system.cpu.toL2Bus.respLayer1.occupancy       2857500                       # Layer occupancy (ticks)
 system.cpu.toL2Bus.respLayer1.utilization          0.0                       # Layer utilization (%)
+system.membus.pwrStateResidencyTicks::UNDEFINED 250987138500                       # Cumulative time (in ticks) in various power states
 system.membus.trans_dist::ReadResp               3160                       # Transaction distribution
 system.membus.trans_dist::ReadExReq              1575                       # Transaction distribution
 system.membus.trans_dist::ReadExResp             1575                       # Transaction distribution