summaryrefslogtreecommitdiff
path: root/tests/quick/se/70.twolf
diff options
context:
space:
mode:
authorNilay Vaish <nilay@cs.wisc.edu>2015-04-30 14:17:43 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-04-30 14:17:43 -0500
commitf71fa1715793c764ffa95411e87b73179a7c7b3f (patch)
treeb4095efe0bda4413326c5860754921b7d8ae78e3 /tests/quick/se/70.twolf
parent42fe2df35495685e616f74ad3342953714c7dcc1 (diff)
downloadgem5-f71fa1715793c764ffa95411e87b73179a7c7b3f.tar.xz
stats: arm: updates
Diffstat (limited to 'tests/quick/se/70.twolf')
-rw-r--r--tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt84
-rw-r--r--tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt80
2 files changed, 82 insertions, 82 deletions
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
index e6a9622eb..772df96ed 100644
--- a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
@@ -1,40 +1,40 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.099596 # Number of seconds simulated
-sim_ticks 99596491000 # Number of ticks simulated
-final_tick 99596491000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_ticks 99596491500 # Number of ticks simulated
+final_tick 99596491500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1940320 # Simulator instruction rate (inst/s)
-host_op_rate 2045410 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1121471108 # Simulator tick rate (ticks/s)
-host_mem_usage 304628 # Number of bytes of host memory used
-host_seconds 88.81 # Real time elapsed on the host
-sim_insts 172317409 # Number of instructions simulated
-sim_ops 181650341 # Number of ops (including micro ops) simulated
+host_inst_rate 1304038 # Simulator instruction rate (inst/s)
+host_op_rate 1374666 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 753711187 # Simulator tick rate (ticks/s)
+host_mem_usage 298984 # Number of bytes of host memory used
+host_seconds 132.14 # Real time elapsed on the host
+sim_insts 172317410 # Number of instructions simulated
+sim_ops 181650342 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
-system.physmem.bytes_read::cpu.inst 759440204 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu.inst 759440208 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 110533661 # Number of bytes read from this memory
-system.physmem.bytes_read::total 869973865 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 759440204 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 759440204 # Number of instructions bytes read from this memory
+system.physmem.bytes_read::total 869973869 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu.inst 759440208 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 759440208 # Number of instructions bytes read from this memory
system.physmem.bytes_written::cpu.data 45252940 # Number of bytes written to this memory
system.physmem.bytes_written::total 45252940 # Number of bytes written to this memory
-system.physmem.num_reads::cpu.inst 189860051 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.inst 189860052 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data 27777721 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 217637772 # Number of read requests responded to by this memory
+system.physmem.num_reads::total 217637773 # Number of read requests responded to by this memory
system.physmem.num_writes::cpu.data 12386694 # Number of write requests responded to by this memory
system.physmem.num_writes::total 12386694 # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst 7625170288 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 1109814813 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 8734985101 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 7625170288 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 7625170288 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data 454362795 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 454362795 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 7625170288 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 1564177607 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 9189347896 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst 7625170290 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data 1109814807 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total 8734985097 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst 7625170290 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 7625170290 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data 454362792 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 454362792 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst 7625170290 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data 1564177600 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total 9189347890 # Total bandwidth to/from this memory (bytes/s)
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
@@ -153,11 +153,11 @@ system.cpu.itb.hits 0 # DT
system.cpu.itb.misses 0 # DTB misses
system.cpu.itb.accesses 0 # DTB accesses
system.cpu.workload.num_syscalls 400 # Number of system calls
-system.cpu.numCycles 199192983 # number of cpu cycles simulated
+system.cpu.numCycles 199192984 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.committedInsts 172317409 # Number of instructions committed
-system.cpu.committedOps 181650341 # Number of ops (including micro ops) committed
+system.cpu.committedInsts 172317410 # Number of instructions committed
+system.cpu.committedOps 181650342 # Number of ops (including micro ops) committed
system.cpu.num_int_alu_accesses 143085668 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 1752310 # Number of float alu accesses
system.cpu.num_func_calls 3545028 # number of times a function call or return occured
@@ -168,18 +168,18 @@ system.cpu.num_int_register_reads 241970171 # nu
system.cpu.num_int_register_writes 98192342 # number of times the integer registers were written
system.cpu.num_fp_register_reads 2822225 # number of times the floating registers were read
system.cpu.num_fp_register_writes 2378039 # number of times the floating registers were written
-system.cpu.num_cc_register_reads 543309967 # number of times the CC registers were read
+system.cpu.num_cc_register_reads 543309970 # number of times the CC registers were read
system.cpu.num_cc_register_writes 190815535 # number of times the CC registers were written
system.cpu.num_mem_refs 40540779 # number of memory refs
system.cpu.num_load_insts 27896144 # Number of load instructions
system.cpu.num_store_insts 12644635 # Number of store instructions
system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
-system.cpu.num_busy_cycles 199192982.998000 # Number of busy cycles
+system.cpu.num_busy_cycles 199192983.998000 # Number of busy cycles
system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
-system.cpu.Branches 40300311 # Number of branches fetched
+system.cpu.Branches 40300312 # Number of branches fetched
system.cpu.op_class::No_OpClass 0 0.00% 0.00% # Class of executed instruction
-system.cpu.op_class::IntAlu 138988212 76.51% 76.51% # Class of executed instruction
+system.cpu.op_class::IntAlu 138988213 76.51% 76.51% # Class of executed instruction
system.cpu.op_class::IntMult 908940 0.50% 77.01% # Class of executed instruction
system.cpu.op_class::IntDiv 0 0.00% 77.01% # Class of executed instruction
system.cpu.op_class::FloatAdd 0 0.00% 77.01% # Class of executed instruction
@@ -212,9 +212,9 @@ system.cpu.op_class::MemRead 27896144 15.36% 93.04% # Cl
system.cpu.op_class::MemWrite 12644635 6.96% 100.00% # Class of executed instruction
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::total 181650742 # Class of executed instruction
-system.membus.trans_dist::ReadReq 217614902 # Transaction distribution
-system.membus.trans_dist::ReadResp 217637309 # Transaction distribution
+system.cpu.op_class::total 181650743 # Class of executed instruction
+system.membus.trans_dist::ReadReq 217614903 # Transaction distribution
+system.membus.trans_dist::ReadResp 217637310 # Transaction distribution
system.membus.trans_dist::WriteReq 12364287 # Transaction distribution
system.membus.trans_dist::WriteResp 12364287 # Transaction distribution
system.membus.trans_dist::SoftPFReq 463 # Transaction distribution
@@ -222,24 +222,24 @@ system.membus.trans_dist::SoftPFResp 463 # Tr
system.membus.trans_dist::LoadLockedReq 22407 # Transaction distribution
system.membus.trans_dist::StoreCondReq 22407 # Transaction distribution
system.membus.trans_dist::StoreCondResp 22407 # Transaction distribution
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 379720102 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 379720104 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 80328830 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 460048932 # Packet count per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 759440204 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count::total 460048934 # Packet count per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 759440208 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 155786601 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total 915226805 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size::total 915226809 # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops 0 # Total snoops (count)
-system.membus.snoop_fanout::samples 230024466 # Request fanout histogram
+system.membus.snoop_fanout::samples 230024467 # Request fanout histogram
system.membus.snoop_fanout::mean 2.825391 # Request fanout histogram
system.membus.snoop_fanout::stdev 0.379633 # Request fanout histogram
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
system.membus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram
system.membus.snoop_fanout::2 40164415 17.46% 17.46% # Request fanout histogram
-system.membus.snoop_fanout::3 189860051 82.54% 100.00% # Request fanout histogram
+system.membus.snoop_fanout::3 189860052 82.54% 100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value 2 # Request fanout histogram
system.membus.snoop_fanout::max_value 3 # Request fanout histogram
-system.membus.snoop_fanout::total 230024466 # Request fanout histogram
+system.membus.snoop_fanout::total 230024467 # Request fanout histogram
---------- End Simulation Statistics ----------
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
index 6ce1a7f0e..e97c269ba 100644
--- a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
@@ -1,16 +1,16 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.230173 # Number of seconds simulated
-sim_ticks 230173357500 # Number of ticks simulated
-final_tick 230173357500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_ticks 230173358500 # Number of ticks simulated
+final_tick 230173358500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1098511 # Simulator instruction rate (inst/s)
-host_op_rate 1158108 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1471393960 # Simulator tick rate (ticks/s)
-host_mem_usage 313104 # Number of bytes of host memory used
-host_seconds 156.43 # Real time elapsed on the host
-sim_insts 171842483 # Number of instructions simulated
-sim_ops 181165370 # Number of ops (including micro ops) simulated
+host_inst_rate 794003 # Simulator instruction rate (inst/s)
+host_op_rate 837080 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1063522318 # Simulator tick rate (ticks/s)
+host_mem_usage 308720 # Number of bytes of host memory used
+host_seconds 216.43 # Real time elapsed on the host
+sim_insts 171842484 # Number of instructions simulated
+sim_ops 181165371 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu.inst 110656 # Number of bytes read from this memory
@@ -147,11 +147,11 @@ system.cpu.itb.hits 0 # DT
system.cpu.itb.misses 0 # DTB misses
system.cpu.itb.accesses 0 # DTB accesses
system.cpu.workload.num_syscalls 400 # Number of system calls
-system.cpu.numCycles 460346715 # number of cpu cycles simulated
+system.cpu.numCycles 460346717 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.committedInsts 171842483 # Number of instructions committed
-system.cpu.committedOps 181165370 # Number of ops (including micro ops) committed
+system.cpu.committedInsts 171842484 # Number of instructions committed
+system.cpu.committedOps 181165371 # Number of ops (including micro ops) committed
system.cpu.num_int_alu_accesses 143085668 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 1752310 # Number of float alu accesses
system.cpu.num_func_calls 3545028 # number of times a function call or return occured
@@ -162,18 +162,18 @@ system.cpu.num_int_register_reads 242291225 # nu
system.cpu.num_int_register_writes 98192342 # number of times the integer registers were written
system.cpu.num_fp_register_reads 2822225 # number of times the floating registers were read
system.cpu.num_fp_register_writes 2378039 # number of times the floating registers were written
-system.cpu.num_cc_register_reads 626384527 # number of times the CC registers were read
+system.cpu.num_cc_register_reads 626384530 # number of times the CC registers were read
system.cpu.num_cc_register_writes 190815535 # number of times the CC registers were written
system.cpu.num_mem_refs 40540779 # number of memory refs
system.cpu.num_load_insts 27896144 # Number of load instructions
system.cpu.num_store_insts 12644635 # Number of store instructions
system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
-system.cpu.num_busy_cycles 460346714.998000 # Number of busy cycles
+system.cpu.num_busy_cycles 460346716.998000 # Number of busy cycles
system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
-system.cpu.Branches 40300311 # Number of branches fetched
+system.cpu.Branches 40300312 # Number of branches fetched
system.cpu.op_class::No_OpClass 0 0.00% 0.00% # Class of executed instruction
-system.cpu.op_class::IntAlu 138988212 76.51% 76.51% # Class of executed instruction
+system.cpu.op_class::IntAlu 138988213 76.51% 76.51% # Class of executed instruction
system.cpu.op_class::IntMult 908940 0.50% 77.01% # Class of executed instruction
system.cpu.op_class::IntDiv 0 0.00% 77.01% # Class of executed instruction
system.cpu.op_class::FloatAdd 0 0.00% 77.01% # Class of executed instruction
@@ -206,14 +206,14 @@ system.cpu.op_class::MemRead 27896144 15.36% 93.04% # Cl
system.cpu.op_class::MemWrite 12644635 6.96% 100.00% # Class of executed instruction
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::total 181650742 # Class of executed instruction
+system.cpu.op_class::total 181650743 # Class of executed instruction
system.cpu.dcache.tags.replacements 40 # number of replacements
-system.cpu.dcache.tags.tagsinuse 1363.619277 # Cycle average of tags in use
+system.cpu.dcache.tags.tagsinuse 1363.619271 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 40162626 # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs 1789 # Sample count of references to valid blocks.
system.cpu.dcache.tags.avg_refs 22449.762996 # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 1363.619277 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_blocks::cpu.data 1363.619271 # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data 0.332915 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total 0.332915 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024 1749 # Occupied blocks per task id
@@ -341,12 +341,12 @@ system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 52003.912800
system.cpu.dcache.overall_avg_mshr_miss_latency::total 52003.912800 # average overall mshr miss latency
system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.icache.tags.replacements 1506 # number of replacements
-system.cpu.icache.tags.tagsinuse 1147.992598 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 189857001 # Total number of references to valid blocks.
+system.cpu.icache.tags.tagsinuse 1147.992594 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 189857002 # Total number of references to valid blocks.
system.cpu.icache.tags.sampled_refs 3051 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 62227.794494 # Average number of references to valid blocks.
+system.cpu.icache.tags.avg_refs 62227.794821 # Average number of references to valid blocks.
system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 1147.992598 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_blocks::cpu.inst 1147.992594 # Average occupied blocks per requestor
system.cpu.icache.tags.occ_percent::cpu.inst 0.560543 # Average percentage of cache occupancy
system.cpu.icache.tags.occ_percent::total 0.560543 # Average percentage of cache occupancy
system.cpu.icache.tags.occ_task_id_blocks::1024 1545 # Occupied blocks per task id
@@ -356,14 +356,14 @@ system.cpu.icache.tags.age_task_id_blocks_1024::2 288
system.cpu.icache.tags.age_task_id_blocks_1024::3 270 # Occupied blocks per task id
system.cpu.icache.tags.age_task_id_blocks_1024::4 942 # Occupied blocks per task id
system.cpu.icache.tags.occ_task_id_percent::1024 0.754395 # Percentage of cache occupancy per task id
-system.cpu.icache.tags.tag_accesses 379723155 # Number of tag accesses
-system.cpu.icache.tags.data_accesses 379723155 # Number of data accesses
-system.cpu.icache.ReadReq_hits::cpu.inst 189857001 # number of ReadReq hits
-system.cpu.icache.ReadReq_hits::total 189857001 # number of ReadReq hits
-system.cpu.icache.demand_hits::cpu.inst 189857001 # number of demand (read+write) hits
-system.cpu.icache.demand_hits::total 189857001 # number of demand (read+write) hits
-system.cpu.icache.overall_hits::cpu.inst 189857001 # number of overall hits
-system.cpu.icache.overall_hits::total 189857001 # number of overall hits
+system.cpu.icache.tags.tag_accesses 379723157 # Number of tag accesses
+system.cpu.icache.tags.data_accesses 379723157 # Number of data accesses
+system.cpu.icache.ReadReq_hits::cpu.inst 189857002 # number of ReadReq hits
+system.cpu.icache.ReadReq_hits::total 189857002 # number of ReadReq hits
+system.cpu.icache.demand_hits::cpu.inst 189857002 # number of demand (read+write) hits
+system.cpu.icache.demand_hits::total 189857002 # number of demand (read+write) hits
+system.cpu.icache.overall_hits::cpu.inst 189857002 # number of overall hits
+system.cpu.icache.overall_hits::total 189857002 # number of overall hits
system.cpu.icache.ReadReq_misses::cpu.inst 3051 # number of ReadReq misses
system.cpu.icache.ReadReq_misses::total 3051 # number of ReadReq misses
system.cpu.icache.demand_misses::cpu.inst 3051 # number of demand (read+write) misses
@@ -376,12 +376,12 @@ system.cpu.icache.demand_miss_latency::cpu.inst 112371000
system.cpu.icache.demand_miss_latency::total 112371000 # number of demand (read+write) miss cycles
system.cpu.icache.overall_miss_latency::cpu.inst 112371000 # number of overall miss cycles
system.cpu.icache.overall_miss_latency::total 112371000 # number of overall miss cycles
-system.cpu.icache.ReadReq_accesses::cpu.inst 189860052 # number of ReadReq accesses(hits+misses)
-system.cpu.icache.ReadReq_accesses::total 189860052 # number of ReadReq accesses(hits+misses)
-system.cpu.icache.demand_accesses::cpu.inst 189860052 # number of demand (read+write) accesses
-system.cpu.icache.demand_accesses::total 189860052 # number of demand (read+write) accesses
-system.cpu.icache.overall_accesses::cpu.inst 189860052 # number of overall (read+write) accesses
-system.cpu.icache.overall_accesses::total 189860052 # number of overall (read+write) accesses
+system.cpu.icache.ReadReq_accesses::cpu.inst 189860053 # number of ReadReq accesses(hits+misses)
+system.cpu.icache.ReadReq_accesses::total 189860053 # number of ReadReq accesses(hits+misses)
+system.cpu.icache.demand_accesses::cpu.inst 189860053 # number of demand (read+write) accesses
+system.cpu.icache.demand_accesses::total 189860053 # number of demand (read+write) accesses
+system.cpu.icache.overall_accesses::cpu.inst 189860053 # number of overall (read+write) accesses
+system.cpu.icache.overall_accesses::total 189860053 # number of overall (read+write) accesses
system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.000016 # miss rate for ReadReq accesses
system.cpu.icache.ReadReq_miss_rate::total 0.000016 # miss rate for ReadReq accesses
system.cpu.icache.demand_miss_rate::cpu.inst 0.000016 # miss rate for demand accesses
@@ -428,14 +428,14 @@ system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 35330.875123
system.cpu.icache.overall_avg_mshr_miss_latency::total 35330.875123 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 1675.663349 # Cycle average of tags in use
+system.cpu.l2cache.tags.tagsinuse 1675.663342 # Cycle average of tags in use
system.cpu.l2cache.tags.total_refs 1380 # Total number of references to valid blocks.
system.cpu.l2cache.tags.sampled_refs 2369 # Sample count of references to valid blocks.
system.cpu.l2cache.tags.avg_refs 0.582524 # Average number of references to valid blocks.
system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 3.037779 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 1169.036753 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 503.588818 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 1169.036747 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 503.588816 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.000093 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.035676 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.015368 # Average percentage of cache occupancy