arch: Make the ISA class inherit from SimObject

The ISA class on stores the contents of ID registers on many
architectures. In order to make reset values of such registers
configurable, we make the class inherit from SimObject, which allows
us to use the normal generated parameter headers.

This patch introduces a Python helper method, BaseCPU.createThreads(),
which creates a set of ISAs for each of the threads in an SMT
system. Although it is currently only needed when creating
multi-threaded CPUs, it should always be called before instantiating
the system as this is an obvious place to configure ID registers
identifying a thread/CPU.

1 files changed, 25 insertions, 0 deletions

diff --git a/tests/run.py b/tests/run.py
index d0239b2b1..1671d1714 100644
--- a/tests/run.py
+++ b/tests/run.py
@@ -77,6 +77,31 @@ maxtick = m5.MaxTick
 sys.path.append(joinpath(tests_root, category, mode, name))
 execfile(joinpath(tests_root, category, mode, name, 'test.py'))
 
+# Initialize all CPUs in a system
+def initCPUs(sys):
+    def initCPU(cpu):
+        # We might actually have a MemTest object or something similar
+        # here that just pretends to be a CPU.
+        if isinstance(cpu, BaseCPU):
+            cpu.createThreads()
+
+    # The CPU attribute doesn't exist in some cases, e.g. the Ruby
+    # testers.
+    if not hasattr(sys, "cpu"):
+        return
+
+    # The CPU can either be a list of CPUs or a single object.
+    if isinstance(sys.cpu, list):
+        [ initCPU(cpu) for cpu in sys.cpu ]
+    else:
+        initCPU(sys.cpu)
+
+# We might be creating a single system or a dual system. Try
+# initializing the CPUs in all known system attributes.
+for sysattr in [ "system", "testsys", "drivesys" ]:
+    if hasattr(root, sysattr):
+        initCPUs(getattr(root, sysattr))
+
 # instantiate configuration
 m5.instantiate()