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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-10-15 08:07:09 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-10-15 08:07:09 -0400 |
commit | 3cf733bcc07b0a8bf069f8581b7f3902bc38f0e0 (patch) | |
tree | 8513d98d2e8d19c0742084a5fa2f9e9930aa1367 /tests/test-progs | |
parent | 930db9257dbac7e678888a65a17c39bcc87aa7fa (diff) | |
download | gem5-3cf733bcc07b0a8bf069f8581b7f3902bc38f0e0.tar.xz |
Regression: Use addTwoLevelCacheHierarchy in configs
This patch unifies the full-system regression config scripts and uses
the BaseCPU convenience method addTwoLevelCacheHierarchy to connect up
the L1s and L2, and create the bus inbetween.
The patch is a step on the way to use the clock period to express the
cache latencies, as the CPU is now the parent of the L1, L2 and L1-L2
bus, and these modules thus use the CPU clock.
The patch does not change the value of any stats, but plenty names,
and a follow-up patch contains the update to the stats, chaning
system.l2c to system.cpu.l2cache.
Diffstat (limited to 'tests/test-progs')
0 files changed, 0 insertions, 0 deletions