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authorAndreas Hansson <andreas.hansson@arm.com>2013-03-01 13:20:22 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2013-03-01 13:20:22 -0500
commit3ba131f4d50e17170531ea69bd1d3733f498e381 (patch)
tree9a30dd2b214f88235537298f004d1391563b2935 /tests
parent1a58362e25839417047847c7e150a89287a3de7d (diff)
downloadgem5-3ba131f4d50e17170531ea69bd1d3733f498e381.tar.xz
mem: Add support for multi-channel DRAM configurations
This patch adds support for multi-channel instances of the DRAM controller model by stripping away the channel bits in the address decoding. The patch relies on the availiability of address interleaving and, at this time, it is up to the user to configure the interleaving appropriately. At the moment it is assumed that the channel interleaving bits are immediately following the column bits (smallest sensible interleaving). Convenience methods for building multi-channel configurations will be added later.
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