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authorNikos Nikoleris <nikos.nikoleris@arm.com>2018-02-12 15:53:47 +0000
committerNikos Nikoleris <nikos.nikoleris@arm.com>2018-03-20 21:41:45 +0000
commit68af229490fc811aebddf68b3e2e09e63a5fa475 (patch)
tree2a9a9cf0c94c2f490e78b30c2498460e535f3a39 /tests
parentfe187de9bd1aa479ab6cd198522bfd118d0d50ec (diff)
downloadgem5-68af229490fc811aebddf68b3e2e09e63a5fa475.tar.xz
arch-arm, configs: Treat the bootloader rom as cacheable memory
Prior to this changeset the bootloader rom (instantiated as a SimpleMemory) in ruby Arm systems was treated as an IO device and it was fronted by a DMA controller. This changeset moves the bootloader rom and adds it to the system as another memory with a dedicated directory controller. Change-Id: I094fed031cdef7f77a939d94f948d967b349b7e0 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8741 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'tests')
-rw-r--r--tests/configs/base_config.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/tests/configs/base_config.py b/tests/configs/base_config.py
index 2ec041cfc..732d537ea 100644
--- a/tests/configs/base_config.py
+++ b/tests/configs/base_config.py
@@ -170,8 +170,9 @@ class BaseSystem(object):
options.num_cpus = self.num_cpus
options.num_dirs = 2
+ bootmem = getattr(system, 'bootmem', None)
Ruby.create_system(options, True, system, system.iobus,
- system._dma_ports)
+ system._dma_ports, bootmem)
# Create a seperate clock domain for Ruby
system.ruby.clk_domain = SrcClockDomain(