Regression: Fix some bugs in simple-timing-mp-ruby.py.

1 files changed, 4 insertions, 2 deletions

diff --git a/tests/configs/simple-timing-mp-ruby.py b/tests/configs/simple-timing-mp-ruby.py
index 4447967a7..1cab30392 100644
--- a/tests/configs/simple-timing-mp-ruby.py
+++ b/tests/configs/simple-timing-mp-ruby.py
@@ -77,11 +77,13 @@ Ruby.create_system(options, system)
 assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
 
 for (i, cpu) in enumerate(system.cpu):
+    # create the interrupt controller
+    cpu.createInterruptController()
+
     #
     # Tie the cpu ports to the ruby cpu ports
     #
-    cpu.icache_port = system.ruby._cpu_ruby_ports[i].port
-    cpu.dcache_port = system.ruby._cpu_ruby_ports[i].port
+    cpu.connectAllPorts(system.ruby._cpu_ruby_ports[i])
 
 # -----------------------
 # run simulation