diff options
| author | Radhika Jagtap <radhika.jagtap@arm.com> | 2016-12-16 16:55:37 +0000 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-11-16 16:39:19 +0000 |
| commit | 1695c9933b53a606ba7044e1b2dfcfe8c203018e (patch) | |
| tree | 3258a4018ca3d38112b3c70c8748b29051fa93c6 /tests | |
| parent | b549de4707ef22398b179a3a7fd28a996ee18d36 (diff) | |
| download | gem5-1695c9933b53a606ba7044e1b2dfcfe8c203018e.tar.xz | |
tests: Add tests for DRAM low power modes
This patch adds two regression tests that execute the script in the
configs dir for triggering low power mode transitions. A separate
test is required for each page policy because for close-adaptive
page policy the DRAM goes into the Precharge Power-down mode while
for open-adaptive page policy it goes into the Activate Power-down
mode.
Change-Id: Iad61af23f132db046f2857cc3ef64b2bf42cf5e4
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5726
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'tests')
14 files changed, 42072 insertions, 1059 deletions
diff --git a/tests/configs/dram-lowp.py b/tests/configs/dram-lowp.py new file mode 100644 index 000000000..20c774ea9 --- /dev/null +++ b/tests/configs/dram-lowp.py @@ -0,0 +1,68 @@ +# Copyright (c) 2017 ARM Limited +# All rights reserved. +# +# The license below extends only to copyright in the software and shall +# not be construed as granting a license to any other intellectual +# property including but not limited to intellectual property relating +# to a hardware implementation of the functionality of the software +# licensed hereunder. You may use the software subject to the license +# terms below provided that you ensure that this notice is replicated +# unmodified and in its entirety in all distributions of the software, +# modified or unmodified, in source code or in binary form. +# +# Copyright (c) 2015 Jason Lowe-Power +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Radhika Jagtap +# Jason Lowe-Power +# Andreas Hansson +# +# A wrapper around configs/dram/low_power_sweep.py + +# For some reason, this is implicitly needed by run.py +root = None + +import m5 + +def run_test(root): + # Called from tests/run.py + + # Set the working directory in case we are executing from + # outside gem5's source tree + import os + os.chdir(os.path.join(os.path.dirname(__file__), "../")) + + # The path to this script is the only parameter. Delete it so + # we can execute the script that we want to execute. + import sys + del sys.argv[1:] + + # Add a specific page policy and specify the number of ranks + sys.argv.append('-p%s' % page_policy) + sys.argv.append('-r 2') + + # Execute the script we are wrapping + execfile(srcpath('configs/dram/low_power_sweep.py'), globals()) diff --git a/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/config.ini b/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/config.ini index 9f41aca8f..78c2a4fe8 100644 --- a/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/config.ini +++ b/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/config.ini @@ -80,30 +80,30 @@ transition_latency=100000 [system.mem_ctrls] type=DRAMCtrl -IDD0=0.055000 -IDD02=0.000000 -IDD2N=0.032000 -IDD2N2=0.000000 -IDD2P0=0.000000 -IDD2P02=0.000000 -IDD2P1=0.032000 -IDD2P12=0.000000 -IDD3N=0.038000 -IDD3N2=0.000000 -IDD3P0=0.000000 -IDD3P02=0.000000 -IDD3P1=0.038000 -IDD3P12=0.000000 -IDD4R=0.157000 -IDD4R2=0.000000 -IDD4W=0.125000 -IDD4W2=0.000000 -IDD5=0.235000 -IDD52=0.000000 -IDD6=0.020000 -IDD62=0.000000 -VDD=1.500000 -VDD2=0.000000 +IDD0=0.055 +IDD02=0.0 +IDD2N=0.032 +IDD2N2=0.0 +IDD2P0=0.0 +IDD2P02=0.0 +IDD2P1=0.032 +IDD2P12=0.0 +IDD3N=0.038 +IDD3N2=0.0 +IDD3P0=0.0 +IDD3P02=0.0 +IDD3P1=0.038 +IDD3P12=0.0 +IDD4R=0.157 +IDD4R2=0.0 +IDD4W=0.125 +IDD4W2=0.0 +IDD5=0.235 +IDD52=0.0 +IDD6=0.02 +IDD62=0.0 +VDD=1.5 +VDD2=0.0 activation_limit=4 addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 @@ -192,6 +192,7 @@ voltage_domain=system.voltage_domain [system.ruby.dir_cntrl0] type=Directory_Controller children=directory dmaRequestToDir dmaResponseFromDir forwardFromDir requestToDir responseFromDir responseFromMemory +addr_ranges=0:268435455:5:0:0:0 buffer_size=0 clk_domain=system.ruby.clk_domain cluster_id=0 @@ -220,10 +221,8 @@ memory=system.mem_ctrls.port [system.ruby.dir_cntrl0.directory] type=RubyDirectoryMemory +addr_ranges=0:268435455:5:0:0:0 eventq_index=0 -numa_high_bit=5 -size=268435456 -version=0 [system.ruby.dir_cntrl0.dmaRequestToDir] type=MessageBuffer @@ -275,6 +274,7 @@ randomization=false [system.ruby.l1_cntrl0] type=L1Cache_Controller children=cacheMemory forwardToCache mandatoryQueue requestFromCache responseFromCache responseToCache sequencer +addr_ranges=0:18446744073709551615:0:0:0:0 buffer_size=0 cacheMemory=system.ruby.l1_cntrl0.cacheMemory cache_response_latency=12 @@ -1187,5 +1187,5 @@ slave=system.system_port [system.voltage_domain] type=VoltageDomain eventq_index=0 -voltage=1.000000 +voltage=1.0 diff --git a/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simerr b/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simerr index cee0dfc57..afb5ee14f 100755 --- a/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simerr +++ b/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simerr @@ -4,5 +4,8 @@ warn: rounding error > tolerance 1.250000 rounded to 1 warn: rounding error > tolerance 1.250000 rounded to 1 +warn: rounding error > tolerance + 1.250000 rounded to 1 warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes) +info: Entering event queue @ 0. Starting simulation... warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files! diff --git a/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simout b/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simout index cd24395f8..5dc88eaa3 100755 --- a/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simout +++ b/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/simout @@ -1,13 +1,12 @@ -Redirecting stdout to build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby/simout -Redirecting stderr to build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby/simerr +Redirecting stdout to build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby/simout +Redirecting stderr to build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 11 2016 00:00:58 -gem5 started Oct 13 2016 20:19:45 -gem5 executing on e108600-lin, pid 28072 -command line: /work/curdun01/gem5-external.hg/build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/60.rubytest/alpha/linux/rubytest-ruby +gem5 compiled Nov 15 2017 18:28:23 +gem5 started Nov 15 2017 18:28:28 +gem5 executing on e108600-lin, pid 19889 +command line: /work/andsan01/outgoing/gem5/build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby --stats-file 'text://stats.txt?desc=False' -re /work/andsan01/outgoing/gem5/tests/testing/../run.py quick/se/60.rubytest/null/none/rubytest-ruby Global frequency set at 1000000000 ticks per second -info: Entering event queue @ 0. Starting simulation... Exiting @ tick 39431 because Ruby Tester completed diff --git a/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/stats.txt b/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/stats.txt index 22b31e012..0376ace34 100644 --- a/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/stats.txt +++ b/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/stats.txt @@ -1,287 +1,287 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.000039 # Number of seconds simulated -sim_ticks 39431 # Number of ticks simulated -final_tick 39431 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) -sim_freq 1000000000 # Frequency of simulated ticks -host_tick_rate 995299 # Simulator tick rate (ticks/s) -host_mem_usage 392160 # Number of bytes of host memory used -host_seconds 0.04 # Real time elapsed on the host -system.voltage_domain.voltage 1 # Voltage in Volts -system.clk_domain.clock 1 # Clock period in ticks -system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states -system.mem_ctrls.bytes_read::ruby.dir_cntrl0 60224 # Number of bytes read from this memory -system.mem_ctrls.bytes_read::total 60224 # Number of bytes read from this memory -system.mem_ctrls.bytes_written::ruby.dir_cntrl0 60032 # Number of bytes written to this memory -system.mem_ctrls.bytes_written::total 60032 # Number of bytes written to this memory -system.mem_ctrls.num_reads::ruby.dir_cntrl0 941 # Number of read requests responded to by this memory -system.mem_ctrls.num_reads::total 941 # Number of read requests responded to by this memory -system.mem_ctrls.num_writes::ruby.dir_cntrl0 938 # Number of write requests responded to by this memory -system.mem_ctrls.num_writes::total 938 # Number of write requests responded to by this memory -system.mem_ctrls.bw_read::ruby.dir_cntrl0 1527326215 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_read::total 1527326215 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::ruby.dir_cntrl0 1522456950 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::total 1522456950 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_total::ruby.dir_cntrl0 3049783166 # Total bandwidth to/from this memory (bytes/s) -system.mem_ctrls.bw_total::total 3049783166 # Total bandwidth to/from this memory (bytes/s) -system.mem_ctrls.readReqs 941 # Number of read requests accepted -system.mem_ctrls.writeReqs 938 # Number of write requests accepted -system.mem_ctrls.readBursts 941 # Number of DRAM read bursts, including those serviced by the write queue -system.mem_ctrls.writeBursts 938 # Number of DRAM write bursts, including those merged in the write queue -system.mem_ctrls.bytesReadDRAM 50560 # Total number of bytes read from DRAM -system.mem_ctrls.bytesReadWrQ 9664 # Total number of bytes read from write queue -system.mem_ctrls.bytesWritten 49728 # Total number of bytes written to DRAM -system.mem_ctrls.bytesReadSys 60224 # Total read bytes from the system interface side -system.mem_ctrls.bytesWrittenSys 60032 # Total written bytes from the system interface side -system.mem_ctrls.servicedByWrQ 151 # Number of DRAM read bursts serviced by the write queue -system.mem_ctrls.mergedWrBursts 134 # Number of DRAM write bursts merged with an existing one -system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write -system.mem_ctrls.perBankRdBursts::0 259 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::1 247 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::2 238 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::3 46 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::4 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::5 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::6 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::7 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::8 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::9 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::10 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::11 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::12 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::13 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::14 0 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::15 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::0 258 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::1 243 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::2 232 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::3 44 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::5 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::6 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::7 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::9 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::10 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::11 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::12 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::13 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::14 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts -system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry -system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry -system.mem_ctrls.totGap 39357 # Total gap between requests -system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 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does an incoming req see -system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see -system.mem_ctrls.bytesPerActivate::samples 108 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::mean 925.629630 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::gmean 827.187599 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::stdev 260.509945 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::0-127 4 3.70% 3.70% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::128-255 3 2.78% 6.48% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::256-383 2 1.85% 8.33% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::384-511 2 1.85% 10.19% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::512-639 1 0.93% 11.11% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::640-767 1 0.93% 12.04% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::768-895 1 0.93% 12.96% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::896-1023 3 2.78% 15.74% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::1024-1151 91 84.26% 100.00% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::total 108 # Bytes accessed per row activation -system.mem_ctrls.rdPerTurnAround::samples 48 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::mean 16.229167 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::gmean 16.080832 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::stdev 2.837736 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::14-15 10 20.83% 20.83% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::16-17 37 77.08% 97.92% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::34-35 1 2.08% 100.00% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::total 48 # Reads before turning the bus around for writes -system.mem_ctrls.wrPerTurnAround::samples 48 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::mean 16.187500 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::gmean 16.181743 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::stdev 0.445127 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::16 40 83.33% 83.33% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::17 7 14.58% 97.92% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::18 1 2.08% 100.00% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::total 48 # Writes before turning the bus around for reads -system.mem_ctrls.totQLat 14435 # Total ticks spent queuing -system.mem_ctrls.totMemAccLat 29445 # Total ticks spent from burst creation until serviced by the DRAM -system.mem_ctrls.totBusLat 3950 # Total ticks spent in databus transfers -system.mem_ctrls.avgQLat 18.27 # Average queueing delay per DRAM burst -system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst -system.mem_ctrls.avgMemAccLat 37.27 # Average memory access latency per DRAM burst -system.mem_ctrls.avgRdBW 1282.24 # Average DRAM read bandwidth in MiByte/s -system.mem_ctrls.avgWrBW 1261.14 # Average achieved write bandwidth in MiByte/s -system.mem_ctrls.avgRdBWSys 1527.33 # Average system read bandwidth in MiByte/s -system.mem_ctrls.avgWrBWSys 1522.46 # Average system write bandwidth in MiByte/s -system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s -system.mem_ctrls.busUtil 19.87 # Data bus utilization in percentage -system.mem_ctrls.busUtilRead 10.02 # Data bus utilization in percentage for reads -system.mem_ctrls.busUtilWrite 9.85 # Data bus utilization in percentage for writes -system.mem_ctrls.avgRdQLen 1.68 # Average read queue length when enqueuing -system.mem_ctrls.avgWrQLen 25.86 # Average write queue length when enqueuing -system.mem_ctrls.readRowHits 690 # Number of row buffer hits during reads -system.mem_ctrls.writeRowHits 766 # Number of row buffer hits during writes -system.mem_ctrls.readRowHitRate 87.34 # Row buffer hit rate for reads -system.mem_ctrls.writeRowHitRate 95.27 # Row buffer hit rate for writes -system.mem_ctrls.avgGap 20.95 # Average gap between requests -system.mem_ctrls.pageHitRate 91.34 # Row buffer hit rate, read and write combined -system.mem_ctrls_0.actEnergy 792540 # Energy for activate commands per rank (pJ) -system.mem_ctrls_0.preEnergy 417312 # Energy for precharge commands per rank (pJ) -system.mem_ctrls_0.readEnergy 9024960 # Energy for read commands per rank (pJ) -system.mem_ctrls_0.writeEnergy 6489504 # Energy for write commands per rank (pJ) -system.mem_ctrls_0.refreshEnergy 3073200.000000 # Energy for refresh commands per rank (pJ) -system.mem_ctrls_0.actBackEnergy 9767064 # Energy for active background per rank (pJ) -system.mem_ctrls_0.preBackEnergy 64896 # Energy for precharge background per rank (pJ) -system.mem_ctrls_0.actPowerDownEnergy 8135040 # Energy for active power-down per rank (pJ) -system.mem_ctrls_0.prePowerDownEnergy 1152 # Energy for precharge power-down per rank (pJ) -system.mem_ctrls_0.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ) -system.mem_ctrls_0.totalEnergy 37765668 # Total energy per rank (pJ) -system.mem_ctrls_0.averagePower 957.765920 # Core power per rank (mW) -system.mem_ctrls_0.totalIdleTime 17819 # Total Idle time Per DRAM Rank -system.mem_ctrls_0.memoryStateTime::IDLE 29 # Time in different power states -system.mem_ctrls_0.memoryStateTime::REF 1300 # Time in different power states -system.mem_ctrls_0.memoryStateTime::SREF 0 # Time in different power states -system.mem_ctrls_0.memoryStateTime::PRE_PDN 3 # Time in different power states -system.mem_ctrls_0.memoryStateTime::ACT 20259 # Time in different power states -system.mem_ctrls_0.memoryStateTime::ACT_PDN 17840 # Time in different power states -system.mem_ctrls_1.actEnergy 0 # Energy for activate commands per rank (pJ) -system.mem_ctrls_1.preEnergy 0 # Energy for precharge commands per rank (pJ) -system.mem_ctrls_1.readEnergy 0 # Energy for read commands per rank (pJ) -system.mem_ctrls_1.writeEnergy 0 # Energy for write commands per rank (pJ) -system.mem_ctrls_1.refreshEnergy 1229280.000000 # Energy for refresh commands per rank (pJ) -system.mem_ctrls_1.actBackEnergy 224352 # Energy for active background per rank (pJ) -system.mem_ctrls_1.preBackEnergy 3002880 # Energy for precharge background per rank (pJ) -system.mem_ctrls_1.actPowerDownEnergy 0 # Energy for active power-down per rank (pJ) -system.mem_ctrls_1.prePowerDownEnergy 2889984 # Energy for precharge power-down per rank (pJ) -system.mem_ctrls_1.selfRefreshEnergy 5662320 # Energy for self refresh per rank (pJ) -system.mem_ctrls_1.totalEnergy 13008816 # Total energy per rank (pJ) -system.mem_ctrls_1.averagePower 329.913418 # Core power per rank (mW) -system.mem_ctrls_1.totalIdleTime 7526 # Total Idle time Per DRAM Rank -system.mem_ctrls_1.memoryStateTime::IDLE 7786 # Time in different power states -system.mem_ctrls_1.memoryStateTime::REF 526 # Time in different power states -system.mem_ctrls_1.memoryStateTime::SREF 23593 # Time in different power states -system.mem_ctrls_1.memoryStateTime::PRE_PDN 7526 # Time in different power states -system.mem_ctrls_1.memoryStateTime::ACT 0 # Time in different power states -system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states -system.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states -system.cpu.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states -system.ruby.clk_domain.clock 1 # Clock period in ticks -system.ruby.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states -system.ruby.delayHist::bucket_size 1 # delay histogram for all message -system.ruby.delayHist::max_bucket 9 # delay histogram for all message -system.ruby.delayHist::samples 1878 # delay histogram for all message -system.ruby.delayHist::mean 0.221512 # delay histogram for all message -system.ruby.delayHist::stdev 1.129790 # delay histogram for all message -system.ruby.delayHist | 1808 96.27% 96.27% | 0 0.00% 96.27% | 1 0.05% 96.33% | 0 0.00% 96.33% | 0 0.00% 96.33% | 0 0.00% 96.33% | 69 3.67% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message -system.ruby.delayHist::total 1878 # delay histogram for all message +sim_seconds 0.000039 +sim_ticks 39431 +final_tick 39431 +sim_freq 1000000000 +host_tick_rate 701018 +host_mem_usage 390584 +host_seconds 0.06 +system.voltage_domain.voltage 1 +system.clk_domain.clock 1 +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 39431 +system.mem_ctrls.bytes_read::ruby.dir_cntrl0 60224 +system.mem_ctrls.bytes_read::total 60224 +system.mem_ctrls.bytes_written::ruby.dir_cntrl0 60032 +system.mem_ctrls.bytes_written::total 60032 +system.mem_ctrls.num_reads::ruby.dir_cntrl0 941 +system.mem_ctrls.num_reads::total 941 +system.mem_ctrls.num_writes::ruby.dir_cntrl0 938 +system.mem_ctrls.num_writes::total 938 +system.mem_ctrls.bw_read::ruby.dir_cntrl0 1527326215 +system.mem_ctrls.bw_read::total 1527326215 +system.mem_ctrls.bw_write::ruby.dir_cntrl0 1522456950 +system.mem_ctrls.bw_write::total 1522456950 +system.mem_ctrls.bw_total::ruby.dir_cntrl0 3049783166 +system.mem_ctrls.bw_total::total 3049783166 +system.mem_ctrls.readReqs 941 +system.mem_ctrls.writeReqs 938 +system.mem_ctrls.readBursts 941 +system.mem_ctrls.writeBursts 938 +system.mem_ctrls.bytesReadDRAM 50560 +system.mem_ctrls.bytesReadWrQ 9664 +system.mem_ctrls.bytesWritten 49728 +system.mem_ctrls.bytesReadSys 60224 +system.mem_ctrls.bytesWrittenSys 60032 +system.mem_ctrls.servicedByWrQ 151 +system.mem_ctrls.mergedWrBursts 134 +system.mem_ctrls.neitherReadNorWriteReqs 0 +system.mem_ctrls.perBankRdBursts::0 259 +system.mem_ctrls.perBankRdBursts::1 247 +system.mem_ctrls.perBankRdBursts::2 238 +system.mem_ctrls.perBankRdBursts::3 46 +system.mem_ctrls.perBankRdBursts::4 0 +system.mem_ctrls.perBankRdBursts::5 0 +system.mem_ctrls.perBankRdBursts::6 0 +system.mem_ctrls.perBankRdBursts::7 0 +system.mem_ctrls.perBankRdBursts::8 0 +system.mem_ctrls.perBankRdBursts::9 0 +system.mem_ctrls.perBankRdBursts::10 0 +system.mem_ctrls.perBankRdBursts::11 0 +system.mem_ctrls.perBankRdBursts::12 0 +system.mem_ctrls.perBankRdBursts::13 0 +system.mem_ctrls.perBankRdBursts::14 0 +system.mem_ctrls.perBankRdBursts::15 0 +system.mem_ctrls.perBankWrBursts::0 258 +system.mem_ctrls.perBankWrBursts::1 243 +system.mem_ctrls.perBankWrBursts::2 232 +system.mem_ctrls.perBankWrBursts::3 44 +system.mem_ctrls.perBankWrBursts::4 0 +system.mem_ctrls.perBankWrBursts::5 0 +system.mem_ctrls.perBankWrBursts::6 0 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+system.mem_ctrls.rdQLenPdf::1 328 +system.mem_ctrls.rdQLenPdf::2 1 +system.mem_ctrls.rdQLenPdf::3 0 +system.mem_ctrls.rdQLenPdf::4 0 +system.mem_ctrls.rdQLenPdf::5 0 +system.mem_ctrls.rdQLenPdf::6 0 +system.mem_ctrls.rdQLenPdf::7 0 +system.mem_ctrls.rdQLenPdf::8 0 +system.mem_ctrls.rdQLenPdf::9 0 +system.mem_ctrls.rdQLenPdf::10 0 +system.mem_ctrls.rdQLenPdf::11 0 +system.mem_ctrls.rdQLenPdf::12 0 +system.mem_ctrls.rdQLenPdf::13 0 +system.mem_ctrls.rdQLenPdf::14 0 +system.mem_ctrls.rdQLenPdf::15 0 +system.mem_ctrls.rdQLenPdf::16 0 +system.mem_ctrls.rdQLenPdf::17 0 +system.mem_ctrls.rdQLenPdf::18 0 +system.mem_ctrls.rdQLenPdf::19 0 +system.mem_ctrls.rdQLenPdf::20 0 +system.mem_ctrls.rdQLenPdf::21 0 +system.mem_ctrls.rdQLenPdf::22 0 +system.mem_ctrls.rdQLenPdf::23 0 +system.mem_ctrls.rdQLenPdf::24 0 +system.mem_ctrls.rdQLenPdf::25 0 +system.mem_ctrls.rdQLenPdf::26 0 +system.mem_ctrls.rdQLenPdf::27 0 +system.mem_ctrls.rdQLenPdf::28 0 +system.mem_ctrls.rdQLenPdf::29 0 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+system.mem_ctrls.wrQLenPdf::27 67 +system.mem_ctrls.wrQLenPdf::28 48 +system.mem_ctrls.wrQLenPdf::29 48 +system.mem_ctrls.wrQLenPdf::30 48 +system.mem_ctrls.wrQLenPdf::31 48 +system.mem_ctrls.wrQLenPdf::32 48 +system.mem_ctrls.wrQLenPdf::33 0 +system.mem_ctrls.wrQLenPdf::34 0 +system.mem_ctrls.wrQLenPdf::35 0 +system.mem_ctrls.wrQLenPdf::36 0 +system.mem_ctrls.wrQLenPdf::37 0 +system.mem_ctrls.wrQLenPdf::38 0 +system.mem_ctrls.wrQLenPdf::39 0 +system.mem_ctrls.wrQLenPdf::40 0 +system.mem_ctrls.wrQLenPdf::41 0 +system.mem_ctrls.wrQLenPdf::42 0 +system.mem_ctrls.wrQLenPdf::43 0 +system.mem_ctrls.wrQLenPdf::44 0 +system.mem_ctrls.wrQLenPdf::45 0 +system.mem_ctrls.wrQLenPdf::46 0 +system.mem_ctrls.wrQLenPdf::47 0 +system.mem_ctrls.wrQLenPdf::48 0 +system.mem_ctrls.wrQLenPdf::49 0 +system.mem_ctrls.wrQLenPdf::50 0 +system.mem_ctrls.wrQLenPdf::51 0 +system.mem_ctrls.wrQLenPdf::52 0 +system.mem_ctrls.wrQLenPdf::53 0 +system.mem_ctrls.wrQLenPdf::54 0 +system.mem_ctrls.wrQLenPdf::55 0 +system.mem_ctrls.wrQLenPdf::56 0 +system.mem_ctrls.wrQLenPdf::57 0 +system.mem_ctrls.wrQLenPdf::58 0 +system.mem_ctrls.wrQLenPdf::59 0 +system.mem_ctrls.wrQLenPdf::60 0 +system.mem_ctrls.wrQLenPdf::61 0 +system.mem_ctrls.wrQLenPdf::62 0 +system.mem_ctrls.wrQLenPdf::63 0 +system.mem_ctrls.bytesPerActivate::samples 108 +system.mem_ctrls.bytesPerActivate::mean 925.629630 +system.mem_ctrls.bytesPerActivate::gmean 827.187599 +system.mem_ctrls.bytesPerActivate::stdev 260.509945 +system.mem_ctrls.bytesPerActivate::0-127 4 3.70% 3.70% +system.mem_ctrls.bytesPerActivate::128-255 3 2.78% 6.48% +system.mem_ctrls.bytesPerActivate::256-383 2 1.85% 8.33% +system.mem_ctrls.bytesPerActivate::384-511 2 1.85% 10.19% +system.mem_ctrls.bytesPerActivate::512-639 1 0.93% 11.11% +system.mem_ctrls.bytesPerActivate::640-767 1 0.93% 12.04% +system.mem_ctrls.bytesPerActivate::768-895 1 0.93% 12.96% +system.mem_ctrls.bytesPerActivate::896-1023 3 2.78% 15.74% +system.mem_ctrls.bytesPerActivate::1024-1151 91 84.26% 100.00% +system.mem_ctrls.bytesPerActivate::total 108 +system.mem_ctrls.rdPerTurnAround::samples 48 +system.mem_ctrls.rdPerTurnAround::mean 16.229167 +system.mem_ctrls.rdPerTurnAround::gmean 16.080832 +system.mem_ctrls.rdPerTurnAround::stdev 2.837736 +system.mem_ctrls.rdPerTurnAround::14-15 10 20.83% 20.83% +system.mem_ctrls.rdPerTurnAround::16-17 37 77.08% 97.92% +system.mem_ctrls.rdPerTurnAround::34-35 1 2.08% 100.00% +system.mem_ctrls.rdPerTurnAround::total 48 +system.mem_ctrls.wrPerTurnAround::samples 48 +system.mem_ctrls.wrPerTurnAround::mean 16.187500 +system.mem_ctrls.wrPerTurnAround::gmean 16.181743 +system.mem_ctrls.wrPerTurnAround::stdev 0.445127 +system.mem_ctrls.wrPerTurnAround::16 40 83.33% 83.33% +system.mem_ctrls.wrPerTurnAround::17 7 14.58% 97.92% +system.mem_ctrls.wrPerTurnAround::18 1 2.08% 100.00% +system.mem_ctrls.wrPerTurnAround::total 48 +system.mem_ctrls.totQLat 14435 +system.mem_ctrls.totMemAccLat 29445 +system.mem_ctrls.totBusLat 3950 +system.mem_ctrls.avgQLat 18.27 +system.mem_ctrls.avgBusLat 5.00 +system.mem_ctrls.avgMemAccLat 37.27 +system.mem_ctrls.avgRdBW 1282.24 +system.mem_ctrls.avgWrBW 1261.14 +system.mem_ctrls.avgRdBWSys 1527.33 +system.mem_ctrls.avgWrBWSys 1522.46 +system.mem_ctrls.peakBW 12800.00 +system.mem_ctrls.busUtil 19.87 +system.mem_ctrls.busUtilRead 10.02 +system.mem_ctrls.busUtilWrite 9.85 +system.mem_ctrls.avgRdQLen 1.68 +system.mem_ctrls.avgWrQLen 25.86 +system.mem_ctrls.readRowHits 690 +system.mem_ctrls.writeRowHits 766 +system.mem_ctrls.readRowHitRate 87.34 +system.mem_ctrls.writeRowHitRate 95.27 +system.mem_ctrls.avgGap 20.95 +system.mem_ctrls.pageHitRate 91.34 +system.mem_ctrls_0.actEnergy 792540 +system.mem_ctrls_0.preEnergy 417312 +system.mem_ctrls_0.readEnergy 9024960 +system.mem_ctrls_0.writeEnergy 6489504 +system.mem_ctrls_0.refreshEnergy 3073200.000000 +system.mem_ctrls_0.actBackEnergy 9767064 +system.mem_ctrls_0.preBackEnergy 64896 +system.mem_ctrls_0.actPowerDownEnergy 8135040 +system.mem_ctrls_0.prePowerDownEnergy 1152 +system.mem_ctrls_0.selfRefreshEnergy 0 +system.mem_ctrls_0.totalEnergy 37765668 +system.mem_ctrls_0.averagePower 957.765920 +system.mem_ctrls_0.totalIdleTime 17819 +system.mem_ctrls_0.memoryStateTime::IDLE 29 +system.mem_ctrls_0.memoryStateTime::REF 1300 +system.mem_ctrls_0.memoryStateTime::SREF 0 +system.mem_ctrls_0.memoryStateTime::PRE_PDN 3 +system.mem_ctrls_0.memoryStateTime::ACT 20259 +system.mem_ctrls_0.memoryStateTime::ACT_PDN 17840 +system.mem_ctrls_1.actEnergy 0 +system.mem_ctrls_1.preEnergy 0 +system.mem_ctrls_1.readEnergy 0 +system.mem_ctrls_1.writeEnergy 0 +system.mem_ctrls_1.refreshEnergy 1229280.000000 +system.mem_ctrls_1.actBackEnergy 224352 +system.mem_ctrls_1.preBackEnergy 3002880 +system.mem_ctrls_1.actPowerDownEnergy 0 +system.mem_ctrls_1.prePowerDownEnergy 2889984 +system.mem_ctrls_1.selfRefreshEnergy 6214560 +system.mem_ctrls_1.totalEnergy 13561056 +system.mem_ctrls_1.averagePower 343.918643 +system.mem_ctrls_1.totalIdleTime 7526 +system.mem_ctrls_1.memoryStateTime::IDLE 7786 +system.mem_ctrls_1.memoryStateTime::REF 526 +system.mem_ctrls_1.memoryStateTime::SREF 23593 +system.mem_ctrls_1.memoryStateTime::PRE_PDN 7526 +system.mem_ctrls_1.memoryStateTime::ACT 0 +system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 +system.pwrStateResidencyTicks::UNDEFINED 39431 +system.cpu.pwrStateResidencyTicks::UNDEFINED 39431 +system.ruby.clk_domain.clock 1 +system.ruby.pwrStateResidencyTicks::UNDEFINED 39431 +system.ruby.delayHist::bucket_size 1 +system.ruby.delayHist::max_bucket 9 +system.ruby.delayHist::samples 1878 +system.ruby.delayHist::mean 0.221512 +system.ruby.delayHist::stdev 1.129790 +system.ruby.delayHist | 1808 96.27% 96.27% | 0 0.00% 96.27% | 1 0.05% 96.33% | 0 0.00% 96.33% | 0 0.00% 96.33% | 0 0.00% 96.33% | 69 3.67% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.delayHist::total 1878 system.ruby.outstanding_req_hist_seqr::bucket_size 2 system.ruby.outstanding_req_hist_seqr::max_bucket 19 system.ruby.outstanding_req_hist_seqr::samples 997 @@ -315,39 +315,39 @@ system.ruby.miss_latency_hist_seqr::stdev 106.107284 system.ruby.miss_latency_hist_seqr | 2 0.21% 0.21% | 7 0.74% 0.96% | 6 0.64% 1.60% | 71 7.55% 9.15% | 434 46.17% 55.32% | 354 37.66% 92.98% | 33 3.51% 96.49% | 33 3.51% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.miss_latency_hist_seqr::total 940 system.ruby.Directory.incomplete_times_seqr 940 -system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs 0.023788 # Average number of messages in buffer -system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time 0.997388 # Average number of cycles messages are stalled in this MB -system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs 0.047652 # Average number of messages in buffer -system.ruby.dir_cntrl0.requestToDir.avg_stall_time 16.301050 # Average number of cycles messages are stalled in this MB -system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs 0.023864 # Average number of messages in buffer -system.ruby.dir_cntrl0.responseFromDir.avg_stall_time 0.998250 # Average number of cycles messages are stalled in this MB -system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs 0.047652 # Average number of messages in buffer -system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time 0.998276 # Average number of cycles messages are stalled in this MB -system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states -system.ruby.l1_cntrl0.cacheMemory.demand_hits 42 # Number of cache demand hits -system.ruby.l1_cntrl0.cacheMemory.demand_misses 941 # Number of cache demand misses -system.ruby.l1_cntrl0.cacheMemory.demand_accesses 983 # Number of cache demand accesses -system.ruby.l1_cntrl0.forwardToCache.avg_buf_msgs 0.023788 # Average number of messages in buffer -system.ruby.l1_cntrl0.forwardToCache.avg_stall_time 7.382152 # Average number of cycles messages are stalled in this MB -system.ruby.l1_cntrl0.mandatoryQueue.avg_buf_msgs 13.964749 # Average number of messages in buffer -system.ruby.l1_cntrl0.mandatoryQueue.avg_stall_time 523.362675 # Average number of cycles messages are stalled in this MB -system.ruby.l1_cntrl0.requestFromCache.avg_buf_msgs 0.095303 # Average number of messages in buffer -system.ruby.l1_cntrl0.requestFromCache.avg_stall_time 1.999797 # Average number of cycles messages are stalled in this MB -system.ruby.l1_cntrl0.responseToCache.avg_buf_msgs 0.023839 # Average number of messages in buffer -system.ruby.l1_cntrl0.responseToCache.avg_stall_time 6.986686 # Average number of cycles messages are stalled in this MB -system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states -system.ruby.l1_cntrl0.sequencer.store_waiting_on_load 14 # Number of times a store aliased with a pending load -system.ruby.l1_cntrl0.sequencer.store_waiting_on_store 141 # Number of times a store aliased with a pending store -system.ruby.l1_cntrl0.sequencer.load_waiting_on_store 15 # Number of times a load aliased with a pending store -system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states -system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks -system.ruby.network.routers0.port_buffers03.avg_buf_msgs 0.023788 # Average number of messages in buffer -system.ruby.network.routers0.port_buffers03.avg_stall_time 6.385068 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers0.port_buffers04.avg_buf_msgs 0.023839 # Average number of messages in buffer -system.ruby.network.routers0.port_buffers04.avg_stall_time 5.988740 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers0.port_buffers07.avg_buf_msgs 0.261894 # Average number of messages in buffer -system.ruby.network.routers0.port_buffers07.avg_stall_time 11.303840 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states +system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs 0.023788 +system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time 0.997388 +system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs 0.047652 +system.ruby.dir_cntrl0.requestToDir.avg_stall_time 16.301050 +system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs 0.023864 +system.ruby.dir_cntrl0.responseFromDir.avg_stall_time 0.998250 +system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs 0.047652 +system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time 0.998276 +system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 39431 +system.ruby.l1_cntrl0.cacheMemory.demand_hits 42 +system.ruby.l1_cntrl0.cacheMemory.demand_misses 941 +system.ruby.l1_cntrl0.cacheMemory.demand_accesses 983 +system.ruby.l1_cntrl0.forwardToCache.avg_buf_msgs 0.023788 +system.ruby.l1_cntrl0.forwardToCache.avg_stall_time 7.382152 +system.ruby.l1_cntrl0.mandatoryQueue.avg_buf_msgs 13.964749 +system.ruby.l1_cntrl0.mandatoryQueue.avg_stall_time 523.362675 +system.ruby.l1_cntrl0.requestFromCache.avg_buf_msgs 0.095303 +system.ruby.l1_cntrl0.requestFromCache.avg_stall_time 1.999797 +system.ruby.l1_cntrl0.responseToCache.avg_buf_msgs 0.023839 +system.ruby.l1_cntrl0.responseToCache.avg_stall_time 6.986686 +system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 39431 +system.ruby.l1_cntrl0.sequencer.store_waiting_on_load 14 +system.ruby.l1_cntrl0.sequencer.store_waiting_on_store 141 +system.ruby.l1_cntrl0.sequencer.load_waiting_on_store 15 +system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 39431 +system.ruby.memctrl_clk_domain.clock 3 +system.ruby.network.routers0.port_buffers03.avg_buf_msgs 0.023788 +system.ruby.network.routers0.port_buffers03.avg_stall_time 6.385068 +system.ruby.network.routers0.port_buffers04.avg_buf_msgs 0.023839 +system.ruby.network.routers0.port_buffers04.avg_stall_time 5.988740 +system.ruby.network.routers0.port_buffers07.avg_buf_msgs 0.261894 +system.ruby.network.routers0.port_buffers07.avg_stall_time 11.303840 +system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 39431 system.ruby.network.routers0.percent_links_utilized 11.905607 system.ruby.network.routers0.msg_count.Control::2 941 system.ruby.network.routers0.msg_count.Data::2 938 @@ -357,13 +357,13 @@ system.ruby.network.routers0.msg_bytes.Control::2 7528 system.ruby.network.routers0.msg_bytes.Data::2 67536 system.ruby.network.routers0.msg_bytes.Response_Data::4 67680 system.ruby.network.routers0.msg_bytes.Writeback_Control::3 7504 -system.ruby.network.routers1.port_buffers02.avg_buf_msgs 0.047652 # Average number of messages in buffer -system.ruby.network.routers1.port_buffers02.avg_stall_time 15.301709 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers1.port_buffers06.avg_buf_msgs 0.029063 # Average number of messages in buffer -system.ruby.network.routers1.port_buffers06.avg_stall_time 2.396226 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers1.port_buffers07.avg_buf_msgs 0.023864 # Average number of messages in buffer -system.ruby.network.routers1.port_buffers07.avg_stall_time 1.996450 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states +system.ruby.network.routers1.port_buffers02.avg_buf_msgs 0.047652 +system.ruby.network.routers1.port_buffers02.avg_stall_time 15.301709 +system.ruby.network.routers1.port_buffers06.avg_buf_msgs 0.029063 +system.ruby.network.routers1.port_buffers06.avg_stall_time 2.396226 +system.ruby.network.routers1.port_buffers07.avg_buf_msgs 0.023864 +system.ruby.network.routers1.port_buffers07.avg_stall_time 1.996450 +system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 39431 system.ruby.network.routers1.percent_links_utilized 11.910045 system.ruby.network.routers1.msg_count.Control::2 941 system.ruby.network.routers1.msg_count.Data::2 938 @@ -373,25 +373,25 @@ system.ruby.network.routers1.msg_bytes.Control::2 7528 system.ruby.network.routers1.msg_bytes.Data::2 67536 system.ruby.network.routers1.msg_bytes.Response_Data::4 67752 system.ruby.network.routers1.msg_bytes.Writeback_Control::3 7504 -system.ruby.network.int_link_buffers02.avg_buf_msgs 0.047652 # Average number of messages in buffer -system.ruby.network.int_link_buffers02.avg_stall_time 12.303383 # Average number of cycles messages are stalled in this MB -system.ruby.network.int_link_buffers08.avg_buf_msgs 0.023788 # Average number of messages in buffer -system.ruby.network.int_link_buffers08.avg_stall_time 3.393513 # Average number of cycles messages are stalled in this MB -system.ruby.network.int_link_buffers09.avg_buf_msgs 0.023864 # Average number of messages in buffer -system.ruby.network.int_link_buffers09.avg_stall_time 2.994598 # Average number of cycles messages are stalled in this MB -system.ruby.network.int_link_buffers13.avg_buf_msgs 0.023788 # Average number of messages in buffer -system.ruby.network.int_link_buffers13.avg_stall_time 5.387934 # Average number of cycles messages are stalled in this MB -system.ruby.network.int_link_buffers14.avg_buf_msgs 0.023839 # Average number of messages in buffer -system.ruby.network.int_link_buffers14.avg_stall_time 4.990744 # Average number of cycles messages are stalled in this MB -system.ruby.network.int_link_buffers17.avg_buf_msgs 0.047652 # Average number of messages in buffer -system.ruby.network.int_link_buffers17.avg_stall_time 14.302318 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers2.port_buffers03.avg_buf_msgs 0.023788 # Average number of messages in buffer -system.ruby.network.routers2.port_buffers03.avg_stall_time 4.390749 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers2.port_buffers04.avg_buf_msgs 0.023864 # Average number of messages in buffer -system.ruby.network.routers2.port_buffers04.avg_stall_time 3.992696 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers2.port_buffers07.avg_buf_msgs 0.047652 # Average number of messages in buffer -system.ruby.network.routers2.port_buffers07.avg_stall_time 13.302876 # Average number of cycles messages are stalled in this MB -system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states +system.ruby.network.int_link_buffers02.avg_buf_msgs 0.047652 +system.ruby.network.int_link_buffers02.avg_stall_time 12.303383 +system.ruby.network.int_link_buffers08.avg_buf_msgs 0.023788 +system.ruby.network.int_link_buffers08.avg_stall_time 3.393513 +system.ruby.network.int_link_buffers09.avg_buf_msgs 0.023864 +system.ruby.network.int_link_buffers09.avg_stall_time 2.994598 +system.ruby.network.int_link_buffers13.avg_buf_msgs 0.023788 +system.ruby.network.int_link_buffers13.avg_stall_time 5.387934 +system.ruby.network.int_link_buffers14.avg_buf_msgs 0.023839 +system.ruby.network.int_link_buffers14.avg_stall_time 4.990744 +system.ruby.network.int_link_buffers17.avg_buf_msgs 0.047652 +system.ruby.network.int_link_buffers17.avg_stall_time 14.302318 +system.ruby.network.routers2.port_buffers03.avg_buf_msgs 0.023788 +system.ruby.network.routers2.port_buffers03.avg_stall_time 4.390749 +system.ruby.network.routers2.port_buffers04.avg_buf_msgs 0.023864 +system.ruby.network.routers2.port_buffers04.avg_stall_time 3.992696 +system.ruby.network.routers2.port_buffers07.avg_buf_msgs 0.047652 +system.ruby.network.routers2.port_buffers07.avg_stall_time 13.302876 +system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 39431 system.ruby.network.routers2.percent_links_utilized 11.907509 system.ruby.network.routers2.msg_count.Control::2 941 system.ruby.network.routers2.msg_count.Data::2 938 @@ -401,7 +401,7 @@ system.ruby.network.routers2.msg_bytes.Control::2 7528 system.ruby.network.routers2.msg_bytes.Data::2 67536 system.ruby.network.routers2.msg_bytes.Response_Data::4 67680 system.ruby.network.routers2.msg_bytes.Writeback_Control::3 7504 -system.ruby.network.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states +system.ruby.network.pwrStateResidencyTicks::UNDEFINED 39431 system.ruby.network.msg_count.Control 2823 system.ruby.network.msg_count.Data 2814 system.ruby.network.msg_count.Response_Data 2821 @@ -410,7 +410,7 @@ system.ruby.network.msg_byte.Control 22584 system.ruby.network.msg_byte.Data 202608 system.ruby.network.msg_byte.Response_Data 203112 system.ruby.network.msg_byte.Writeback_Control 22512 -system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 39431 # Cumulative time (in ticks) in various power states +system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 39431 system.ruby.network.routers0.throttle0.link_utilization 11.913215 system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 940 system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 938 @@ -441,18 +441,18 @@ system.ruby.network.routers2.throttle1.msg_count.Control::2 941 system.ruby.network.routers2.throttle1.msg_count.Data::2 938 system.ruby.network.routers2.throttle1.msg_bytes.Control::2 7528 system.ruby.network.routers2.throttle1.msg_bytes.Data::2 67536 -system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::samples 940 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1 | 940 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::total 940 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::samples 938 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::mean 0.443497 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::stdev 1.567923 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2 | 868 92.54% 92.54% | 0 0.00% 92.54% | 1 0.11% 92.64% | 0 0.00% 92.64% | 0 0.00% 92.64% | 0 0.00% 92.64% | 69 7.36% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::total 938 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_1::bucket_size 1 +system.ruby.delayVCHist.vnet_1::max_bucket 9 +system.ruby.delayVCHist.vnet_1::samples 940 +system.ruby.delayVCHist.vnet_1 | 940 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.delayVCHist.vnet_1::total 940 +system.ruby.delayVCHist.vnet_2::bucket_size 1 +system.ruby.delayVCHist.vnet_2::max_bucket 9 +system.ruby.delayVCHist.vnet_2::samples 938 +system.ruby.delayVCHist.vnet_2::mean 0.443497 +system.ruby.delayVCHist.vnet_2::stdev 1.567923 +system.ruby.delayVCHist.vnet_2 | 868 92.54% 92.54% | 0 0.00% 92.54% | 1 0.11% 92.64% | 0 0.00% 92.64% | 0 0.00% 92.64% | 0 0.00% 92.64% | 69 7.36% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.delayVCHist.vnet_2::total 938 system.ruby.LD.latency_hist_seqr::bucket_size 128 system.ruby.LD.latency_hist_seqr::max_bucket 1279 system.ruby.LD.latency_hist_seqr::samples 51 diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini index 52ae02408..f673bfd92 100644 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/config.ini @@ -57,12 +57,12 @@ voltage_domain=system.clk_domain.voltage_domain [system.clk_domain.voltage_domain] type=VoltageDomain eventq_index=0 -voltage=1.000000 +voltage=1.0 [system.cpu] type=TrafficGen clk_domain=system.clk_domain -config_file=/work/curdun01/gem5-external.hg/tests/testing/../../tests/quick/se/70.tgen/tgen-dram-ctrl.cfg +config_file=/work/andsan01/outgoing/gem5/tests/testing/../../tests/quick/se/70.tgen/tgen-dram-ctrl.cfg default_p_state=UNDEFINED elastic_req=false eventq_index=0 @@ -131,30 +131,30 @@ slave=system.cpu.port [system.physmem] type=DRAMCtrl -IDD0=0.055000 -IDD02=0.000000 -IDD2N=0.032000 -IDD2N2=0.000000 -IDD2P0=0.000000 -IDD2P02=0.000000 -IDD2P1=0.032000 -IDD2P12=0.000000 -IDD3N=0.038000 -IDD3N2=0.000000 -IDD3P0=0.000000 -IDD3P02=0.000000 -IDD3P1=0.038000 -IDD3P12=0.000000 -IDD4R=0.157000 -IDD4R2=0.000000 -IDD4W=0.125000 -IDD4W2=0.000000 -IDD5=0.235000 -IDD52=0.000000 -IDD6=0.020000 -IDD62=0.000000 -VDD=1.500000 -VDD2=0.000000 +IDD0=0.055 +IDD02=0.0 +IDD2N=0.032 +IDD2N2=0.0 +IDD2P0=0.0 +IDD2P02=0.0 +IDD2P1=0.032 +IDD2P12=0.0 +IDD3N=0.038 +IDD3N2=0.0 +IDD3P0=0.0 +IDD3P02=0.0 +IDD3P1=0.038 +IDD3P12=0.0 +IDD4R=0.157 +IDD4R2=0.0 +IDD4W=0.125 +IDD4W2=0.0 +IDD5=0.235 +IDD52=0.0 +IDD6=0.02 +IDD62=0.0 +VDD=1.5 +VDD2=0.0 activation_limit=4 addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simerr b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simerr index f9e2ef3b2..0f67de88f 100755 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simerr +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simerr @@ -1 +1,2 @@ warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) +info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout index 160888b39..7caa3525a 100755 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/simout @@ -3,11 +3,10 @@ Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram- gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 13 2016 20:37:50 -gem5 started Oct 13 2016 20:38:05 -gem5 executing on e108600-lin, pid 342 -command line: /work/curdun01/gem5-external.hg/build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/70.tgen/null/none/tgen-dram-ctrl +gem5 compiled Nov 15 2017 18:28:23 +gem5 started Nov 15 2017 18:28:28 +gem5 executing on e108600-lin, pid 19888 +command line: /work/andsan01/outgoing/gem5/build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl --stats-file 'text://stats.txt?desc=False' -re /work/andsan01/outgoing/gem5/tests/testing/../run.py quick/se/70.tgen/null/none/tgen-dram-ctrl Global frequency set at 1000000000000 ticks per second -info: Entering event queue @ 0. Starting simulation... Exiting @ tick 100000000000 because simulate() limit reached diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt index 5d77460fc..93742671d 100644 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-dram-ctrl/stats.txt @@ -1,642 +1,642 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.100000 # Number of seconds simulated -sim_ticks 100000000000 # Number of ticks simulated -final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) -sim_freq 1000000000000 # Frequency of simulated ticks -host_tick_rate 5948382023 # Simulator tick rate (ticks/s) -host_mem_usage 222508 # Number of bytes of host memory used -host_seconds 16.81 # Real time elapsed on the host -system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts -system.clk_domain.clock 1000 # Clock period in ticks -system.physmem.pwrStateResidencyTicks::UNDEFINED 100000000000 # Cumulative time (in ticks) in various power states -system.physmem.bytes_read::cpu 106649408 # Number of bytes read from this memory -system.physmem.bytes_read::total 106649408 # Number of bytes read from this memory -system.physmem.bytes_written::cpu 106680256 # Number of bytes written to this memory -system.physmem.bytes_written::total 106680256 # Number of bytes written to this memory -system.physmem.num_reads::cpu 1666397 # Number of read requests responded to by this memory -system.physmem.num_reads::total 1666397 # Number of read requests responded to by this memory -system.physmem.num_writes::cpu 1666879 # Number of write requests responded to by this memory -system.physmem.num_writes::total 1666879 # Number of write requests responded to by this memory -system.physmem.bw_read::cpu 1066494080 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::total 1066494080 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_write::cpu 1066802560 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::total 1066802560 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_total::cpu 2133296640 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 2133296640 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 1666397 # Number of read requests accepted -system.physmem.writeReqs 1666879 # Number of write requests accepted -system.physmem.readBursts 1666397 # Number of DRAM read bursts, including those serviced by the write queue -system.physmem.writeBursts 1666879 # Number of DRAM write bursts, including those merged in the write queue -system.physmem.bytesReadDRAM 106647808 # Total number of bytes read from DRAM -system.physmem.bytesReadWrQ 1600 # Total number of bytes read from write queue -system.physmem.bytesWritten 106676416 # Total number of bytes written to DRAM -system.physmem.bytesReadSys 106649408 # Total read bytes from the system interface side -system.physmem.bytesWrittenSys 106680256 # Total written bytes from the system interface side -system.physmem.servicedByWrQ 25 # Number of DRAM read bursts serviced by the write queue -system.physmem.mergedWrBursts 31 # Number of DRAM write bursts merged with an existing one -system.physmem.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write -system.physmem.perBankRdBursts::0 104029 # Per bank write bursts -system.physmem.perBankRdBursts::1 103995 # Per bank write bursts -system.physmem.perBankRdBursts::2 104918 # Per bank write bursts -system.physmem.perBankRdBursts::3 104597 # Per bank write bursts -system.physmem.perBankRdBursts::4 103869 # Per bank write bursts -system.physmem.perBankRdBursts::5 103933 # Per bank write bursts -system.physmem.perBankRdBursts::6 103649 # Per bank write bursts -system.physmem.perBankRdBursts::7 104313 # Per bank write bursts -system.physmem.perBankRdBursts::8 103869 # Per bank write bursts -system.physmem.perBankRdBursts::9 104354 # Per bank write bursts -system.physmem.perBankRdBursts::10 103834 # Per bank write bursts -system.physmem.perBankRdBursts::11 104271 # Per bank write bursts -system.physmem.perBankRdBursts::12 104077 # Per bank write bursts -system.physmem.perBankRdBursts::13 104035 # Per bank write bursts -system.physmem.perBankRdBursts::14 104583 # Per bank write bursts -system.physmem.perBankRdBursts::15 104046 # Per bank write bursts -system.physmem.perBankWrBursts::0 104356 # Per bank write bursts -system.physmem.perBankWrBursts::1 104090 # Per bank write bursts -system.physmem.perBankWrBursts::2 104175 # Per bank write bursts -system.physmem.perBankWrBursts::3 103885 # Per bank write bursts -system.physmem.perBankWrBursts::4 104730 # Per bank write bursts -system.physmem.perBankWrBursts::5 104507 # Per bank write bursts -system.physmem.perBankWrBursts::6 104083 # Per bank write bursts -system.physmem.perBankWrBursts::7 104224 # Per bank write bursts -system.physmem.perBankWrBursts::8 104317 # Per bank write bursts -system.physmem.perBankWrBursts::9 104219 # Per bank write bursts -system.physmem.perBankWrBursts::10 104226 # Per bank write bursts -system.physmem.perBankWrBursts::11 103701 # Per bank write bursts -system.physmem.perBankWrBursts::12 104104 # Per bank write bursts -system.physmem.perBankWrBursts::13 103984 # Per bank write bursts -system.physmem.perBankWrBursts::14 104295 # Per bank write bursts -system.physmem.perBankWrBursts::15 103923 # Per bank write bursts -system.physmem.numRdRetry 0 # Number of times read queue was full causing retry -system.physmem.numWrRetry 0 # Number of times write queue was full causing retry -system.physmem.totGap 99999956143 # Total gap between requests -system.physmem.readPktSize::0 0 # Read request sizes (log2) -system.physmem.readPktSize::1 0 # Read request sizes (log2) -system.physmem.readPktSize::2 0 # Read request sizes (log2) -system.physmem.readPktSize::3 0 # Read request sizes (log2) -system.physmem.readPktSize::4 0 # Read request sizes (log2) -system.physmem.readPktSize::5 0 # Read request sizes (log2) -system.physmem.readPktSize::6 1666397 # Read request sizes (log2) -system.physmem.writePktSize::0 0 # Write request sizes (log2) -system.physmem.writePktSize::1 0 # Write request sizes (log2) -system.physmem.writePktSize::2 0 # Write request sizes (log2) -system.physmem.writePktSize::3 0 # Write request sizes (log2) -system.physmem.writePktSize::4 0 # Write request sizes (log2) -system.physmem.writePktSize::5 0 # Write request sizes (log2) -system.physmem.writePktSize::6 1666879 # Write request sizes (log2) -system.physmem.rdQLenPdf::0 733345 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::1 766437 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::2 105881 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::3 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an incoming req see -system.physmem.wrQLenPdf::54 0 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::55 0 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::56 0 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::57 0 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::58 0 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::59 0 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::60 0 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see -system.physmem.bytesPerActivate::samples 3296279 # Bytes accessed per row activation -system.physmem.bytesPerActivate::mean 64.716502 # Bytes accessed per row activation -system.physmem.bytesPerActivate::gmean 64.191055 # Bytes accessed per row activation -system.physmem.bytesPerActivate::stdev 24.099997 # Bytes accessed per row activation -system.physmem.bytesPerActivate::0-127 3288385 99.76% 99.76% # Bytes accessed per row activation -system.physmem.bytesPerActivate::128-255 5777 0.18% 99.94% # Bytes accessed per row activation -system.physmem.bytesPerActivate::256-383 32 0.00% 99.94% # Bytes accessed per row activation -system.physmem.bytesPerActivate::384-511 2 0.00% 99.94% # Bytes accessed per row activation -system.physmem.bytesPerActivate::512-639 1 0.00% 99.94% # Bytes accessed per row activation -system.physmem.bytesPerActivate::640-767 1 0.00% 99.94% # Bytes accessed per row activation -system.physmem.bytesPerActivate::768-895 64 0.00% 99.94% # Bytes accessed per row activation -system.physmem.bytesPerActivate::896-1023 31 0.00% 99.94% # Bytes accessed per row activation -system.physmem.bytesPerActivate::1024-1151 1986 0.06% 100.00% # Bytes accessed per row activation -system.physmem.bytesPerActivate::total 3296279 # Bytes accessed per row activation -system.physmem.rdPerTurnAround::samples 99671 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::mean 16.718725 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::gmean 15.378386 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::stdev 105.780207 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::0-2047 99670 100.00% 100.00% # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::32768-34815 1 0.00% 100.00% # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::total 99671 # Reads before turning the bus around for writes -system.physmem.wrPerTurnAround::samples 99670 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::mean 16.723337 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::gmean 16.645091 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::stdev 1.734543 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::16 81521 81.79% 81.79% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::17 3623 3.63% 85.43% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::18 1868 1.87% 87.30% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::19 729 0.73% 88.03% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::20 852 0.85% 88.89% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::21 7918 7.94% 96.83% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::22 2886 2.90% 99.73% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::23 125 0.13% 99.85% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::24 64 0.06% 99.92% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::25 33 0.03% 99.95% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::26 22 0.02% 99.97% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::27 19 0.02% 99.99% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::28 8 0.01% 100.00% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::29 2 0.00% 100.00% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::total 99670 # Writes before turning the bus around for reads -system.physmem.totQLat 67244030509 # Total ticks spent queuing -system.physmem.totMemAccLat 98488505509 # Total ticks spent from burst creation until serviced by the DRAM -system.physmem.totBusLat 8331860000 # Total ticks spent in databus transfers -system.physmem.avgQLat 40353.55 # Average queueing delay per DRAM burst -system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst -system.physmem.avgMemAccLat 59103.55 # Average memory access latency per DRAM burst -system.physmem.avgRdBW 1066.48 # Average DRAM read bandwidth in MiByte/s -system.physmem.avgWrBW 1066.76 # Average achieved write bandwidth in MiByte/s -system.physmem.avgRdBWSys 1066.49 # Average system read bandwidth in MiByte/s -system.physmem.avgWrBWSys 1066.80 # Average system write bandwidth in MiByte/s -system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s -system.physmem.busUtil 16.67 # Data bus utilization in percentage -system.physmem.busUtilRead 8.33 # Data bus utilization in percentage for reads -system.physmem.busUtilWrite 8.33 # Data bus utilization in percentage for writes -system.physmem.avgRdQLen 1.72 # Average read queue length when enqueuing -system.physmem.avgWrQLen 25.49 # Average write queue length when enqueuing -system.physmem.readRowHits 32189 # Number of row buffer hits during reads -system.physmem.writeRowHits 4714 # Number of row buffer hits during writes -system.physmem.readRowHitRate 1.93 # Row buffer hit rate for reads -system.physmem.writeRowHitRate 0.28 # Row buffer hit rate for writes -system.physmem.avgGap 30000.50 # Average gap between requests -system.physmem.pageHitRate 1.11 # Row buffer hit rate, read and write combined -system.physmem_0.actEnergy 11770732680 # Energy for activate commands per rank (pJ) -system.physmem_0.preEnergy 6256266225 # Energy for precharge commands per rank (pJ) -system.physmem_0.readEnergy 5949783420 # Energy for read commands per rank (pJ) -system.physmem_0.writeEnergy 4353725340 # Energy for write commands per rank (pJ) -system.physmem_0.refreshEnergy 7874767680.000002 # Energy for refresh commands per rank (pJ) -system.physmem_0.actBackEnergy 23951915280 # Energy for active background per rank (pJ) -system.physmem_0.preBackEnergy 170961120 # Energy for precharge background per rank (pJ) -system.physmem_0.actPowerDownEnergy 21181523760 # Energy for active power-down per rank (pJ) -system.physmem_0.prePowerDownEnergy 86810400 # Energy for precharge power-down per rank (pJ) -system.physmem_0.selfRefreshEnergy 93287040 # Energy for self refresh per rank (pJ) -system.physmem_0.totalEnergy 81689772945 # Total energy per rank (pJ) -system.physmem_0.averagePower 816.897729 # Core power per rank (mW) -system.physmem_0.totalIdleTime 47012409463 # Total Idle time Per DRAM Rank -system.physmem_0.memoryStateTime::IDLE 55286905 # Time in different power states -system.physmem_0.memoryStateTime::REF 3331216000 # Time in different power states -system.physmem_0.memoryStateTime::SREF 351864100 # Time in different power states -system.physmem_0.memoryStateTime::PRE_PDN 225022822 # Time in different power states -system.physmem_0.memoryStateTime::ACT 49601087632 # Time in different power states -system.physmem_0.memoryStateTime::ACT_PDN 46435522541 # Time in different power states -system.physmem_1.actEnergy 11764756500 # Energy for activate commands per rank (pJ) -system.physmem_1.preEnergy 6253097400 # Energy for precharge commands per rank (pJ) -system.physmem_1.readEnergy 5948112660 # Energy for read commands per rank (pJ) -system.physmem_1.writeEnergy 4347048960 # Energy for write commands per rank (pJ) -system.physmem_1.refreshEnergy 7875382320.000002 # Energy for refresh commands per rank (pJ) -system.physmem_1.actBackEnergy 23997343140 # Energy for active background per rank (pJ) -system.physmem_1.preBackEnergy 173667360 # Energy for precharge background per rank (pJ) -system.physmem_1.actPowerDownEnergy 21132301410 # Energy for active power-down per rank (pJ) -system.physmem_1.prePowerDownEnergy 86542080 # Energy for precharge power-down per rank (pJ) -system.physmem_1.selfRefreshEnergy 94312680 # Energy for self refresh per rank (pJ) -system.physmem_1.totalEnergy 81672564510 # Total energy per rank (pJ) -system.physmem_1.averagePower 816.725645 # Core power per rank (mW) -system.physmem_1.totalIdleTime 46910670248 # Total Idle time Per DRAM Rank -system.physmem_1.memoryStateTime::IDLE 62942667 # Time in different power states -system.physmem_1.memoryStateTime::REF 3331488000 # Time in different power states -system.physmem_1.memoryStateTime::SREF 353836348 # Time in different power states -system.physmem_1.memoryStateTime::PRE_PDN 224863707 # Time in different power states -system.physmem_1.memoryStateTime::ACT 49694899085 # Time in different power states -system.physmem_1.memoryStateTime::ACT_PDN 46331970193 # Time in different power states -system.pwrStateResidencyTicks::UNDEFINED 100000000000 # Cumulative time (in ticks) in various power states -system.cpu.pwrStateResidencyTicks::UNDEFINED 100000000000 # Cumulative time (in ticks) in various power states -system.cpu.numPackets 3333276 # Number of packets generated -system.cpu.numRetries 0 # Number of retries -system.cpu.retryTicks 0 # Time spent waiting due to back-pressure (ticks) -system.membus.pwrStateResidencyTicks::UNDEFINED 100000000000 # Cumulative time (in ticks) in various power states -system.membus.trans_dist::ReadReq 1666397 # Transaction distribution -system.membus.trans_dist::ReadResp 1666397 # Transaction distribution -system.membus.trans_dist::WriteReq 1666879 # Transaction distribution -system.membus.trans_dist::WriteResp 1666878 # Transaction distribution -system.membus.pkt_count_system.monitor-master::system.physmem.port 6666551 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::total 6666551 # Packet count per connected master and slave (bytes) -system.membus.pkt_size_system.monitor-master::system.physmem.port 213329664 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size::total 213329664 # Cumulative packet size per connected master and slave (bytes) -system.membus.reqLayer0.occupancy 11679751447 # Layer occupancy (ticks) -system.membus.reqLayer0.utilization 11.7 # Layer utilization (%) -system.membus.respLayer0.occupancy 11024098980 # Layer occupancy (ticks) -system.membus.respLayer0.utilization 11.0 # Layer utilization (%) -system.monitor.pwrStateResidencyTicks::UNDEFINED 100000000000 # Cumulative time (in ticks) in various power states -system.monitor.readBurstLengthHist::samples 1666397 # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::mean 64 # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::gmean 64.000000 # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::stdev 0 # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::0-3 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::4-7 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::8-11 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::12-15 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::16-19 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::20-23 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::24-27 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::28-31 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::32-35 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::36-39 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::40-43 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::44-47 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::48-51 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::52-55 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::56-59 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::60-63 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::64-67 1666397 100.00% 100.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::68-71 0 0.00% 100.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::72-75 0 0.00% 100.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::76-79 0 0.00% 100.00% # Histogram of burst lengths of transmitted packets -system.monitor.readBurstLengthHist::total 1666397 # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::samples 1666879 # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::mean 64 # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::gmean 64.000000 # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::stdev 0 # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::0-3 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::4-7 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::8-11 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::12-15 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::16-19 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::20-23 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::24-27 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::28-31 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::32-35 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::36-39 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::40-43 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::44-47 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::48-51 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::52-55 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::56-59 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::60-63 0 0.00% 0.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::64-67 1666879 100.00% 100.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::68-71 0 0.00% 100.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::72-75 0 0.00% 100.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::76-79 0 0.00% 100.00% # Histogram of burst lengths of transmitted packets -system.monitor.writeBurstLengthHist::total 1666879 # Histogram of burst lengths of transmitted packets -system.monitor.readBandwidthHist::samples 100 # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::mean 1066494080 # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::gmean 1063154829.648824 # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::stdev 107909695.124640 # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::0-1.34218e+08 0 0.00% 0.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::1.34218e+08-2.68435e+08 0 0.00% 0.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::2.68435e+08-4.02653e+08 0 0.00% 0.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::4.02653e+08-5.36871e+08 0 0.00% 0.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::5.36871e+08-6.71089e+08 0 0.00% 0.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::6.71089e+08-8.05306e+08 0 0.00% 0.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::8.05306e+08-9.39524e+08 0 0.00% 0.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::9.39524e+08-1.07374e+09 99 99.00% 99.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::1.07374e+09-1.20796e+09 0 0.00% 99.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::1.20796e+09-1.34218e+09 0 0.00% 99.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::1.34218e+09-1.4764e+09 0 0.00% 99.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::1.4764e+09-1.61061e+09 0 0.00% 99.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::1.61061e+09-1.74483e+09 0 0.00% 99.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::1.74483e+09-1.87905e+09 0 0.00% 99.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::1.87905e+09-2.01327e+09 0 0.00% 99.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::2.01327e+09-2.14748e+09 1 1.00% 100.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::2.14748e+09-2.2817e+09 0 0.00% 100.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::2.2817e+09-2.41592e+09 0 0.00% 100.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::2.41592e+09-2.55014e+09 0 0.00% 100.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::2.55014e+09-2.68435e+09 0 0.00% 100.00% # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.readBandwidthHist::total 100 # Histogram of read bandwidth per sample period (bytes/s) -system.monitor.averageReadBandwidth 1066494080 0.00% 0.00% # Average read bandwidth (bytes/s) -system.monitor.totalReadBytes 106649408 # Number of bytes read -system.monitor.writeBandwidthHist::samples 100 # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::mean 1066802560 # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::gmean 0 # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::stdev 107924720.268046 # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::0-6.71089e+07 1 1.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::6.71089e+07-1.34218e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::1.34218e+08-2.01327e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::2.01327e+08-2.68435e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::2.68435e+08-3.35544e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::3.35544e+08-4.02653e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::4.02653e+08-4.69762e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::4.69762e+08-5.36871e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::5.36871e+08-6.0398e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::6.0398e+08-6.71089e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::6.71089e+08-7.38198e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::7.38198e+08-8.05306e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::8.05306e+08-8.72415e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::8.72415e+08-9.39524e+08 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::9.39524e+08-1.00663e+09 0 0.00% 1.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::1.00663e+09-1.07374e+09 29 29.00% 30.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::1.07374e+09-1.14085e+09 70 70.00% 100.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::1.14085e+09-1.20796e+09 0 0.00% 100.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::1.20796e+09-1.27507e+09 0 0.00% 100.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::1.27507e+09-1.34218e+09 0 0.00% 100.00% # Histogram of write bandwidth (bytes/s) -system.monitor.writeBandwidthHist::total 100 # Histogram of write bandwidth (bytes/s) -system.monitor.averageWriteBandwidth 1066802560 0.00% 0.00% # Average write bandwidth (bytes/s) -system.monitor.totalWrittenBytes 106680256 # Number of bytes written -system.monitor.readLatencyHist::samples 1666397 # Read request-response latency -system.monitor.readLatencyHist::mean 85241.043010 # Read request-response latency -system.monitor.readLatencyHist::gmean 80106.557141 # Read request-response latency -system.monitor.readLatencyHist::stdev 40394.991557 # Read request-response latency -system.monitor.readLatencyHist::0-32767 25 0.00% 0.00% # Read request-response latency -system.monitor.readLatencyHist::32768-65535 443615 26.62% 26.62% # Read request-response latency -system.monitor.readLatencyHist::65536-98303 995882 59.76% 86.39% # Read request-response latency -system.monitor.readLatencyHist::98304-131071 85391 5.12% 91.51% # Read request-response latency -system.monitor.readLatencyHist::131072-163839 63740 3.83% 95.33% # Read request-response latency -system.monitor.readLatencyHist::163840-196607 33175 1.99% 97.33% # Read request-response latency -system.monitor.readLatencyHist::196608-229375 11329 0.68% 98.01% # Read request-response latency -system.monitor.readLatencyHist::229376-262143 8224 0.49% 98.50% # Read request-response latency -system.monitor.readLatencyHist::262144-294911 8145 0.49% 98.99% # Read request-response latency -system.monitor.readLatencyHist::294912-327679 8447 0.51% 99.49% # Read request-response latency -system.monitor.readLatencyHist::327680-360447 5871 0.35% 99.85% # Read request-response latency -system.monitor.readLatencyHist::360448-393215 1313 0.08% 99.93% # Read request-response latency -system.monitor.readLatencyHist::393216-425983 659 0.04% 99.97% # Read request-response latency -system.monitor.readLatencyHist::425984-458751 321 0.02% 99.98% # Read request-response latency -system.monitor.readLatencyHist::458752-491519 128 0.01% 99.99% # Read request-response latency -system.monitor.readLatencyHist::491520-524287 34 0.00% 99.99% # Read request-response latency -system.monitor.readLatencyHist::524288-557055 33 0.00% 100.00% # Read request-response latency -system.monitor.readLatencyHist::557056-589823 65 0.00% 100.00% # Read request-response latency -system.monitor.readLatencyHist::589824-622591 0 0.00% 100.00% # Read request-response latency -system.monitor.readLatencyHist::622592-655359 0 0.00% 100.00% # Read request-response latency -system.monitor.readLatencyHist::total 1666397 # Read request-response latency -system.monitor.writeLatencyHist::samples 1666878 # Write request-response latency -system.monitor.writeLatencyHist::mean 20414.077900 # Write request-response latency -system.monitor.writeLatencyHist::gmean 20330.210031 # Write request-response latency -system.monitor.writeLatencyHist::stdev 1962.397109 # Write request-response latency -system.monitor.writeLatencyHist::0-2047 0 0.00% 0.00% # Write request-response latency -system.monitor.writeLatencyHist::2048-4095 0 0.00% 0.00% # Write request-response latency -system.monitor.writeLatencyHist::4096-6143 0 0.00% 0.00% # Write request-response latency -system.monitor.writeLatencyHist::6144-8191 0 0.00% 0.00% # Write request-response latency -system.monitor.writeLatencyHist::8192-10239 0 0.00% 0.00% # Write request-response latency -system.monitor.writeLatencyHist::10240-12287 0 0.00% 0.00% # Write request-response latency -system.monitor.writeLatencyHist::12288-14335 0 0.00% 0.00% # Write request-response latency -system.monitor.writeLatencyHist::14336-16383 0 0.00% 0.00% # Write request-response latency -system.monitor.writeLatencyHist::16384-18431 0 0.00% 0.00% # Write request-response latency -system.monitor.writeLatencyHist::18432-20479 1311621 78.69% 78.69% # Write request-response latency -system.monitor.writeLatencyHist::20480-22527 97272 5.84% 84.52% # Write request-response latency -system.monitor.writeLatencyHist::22528-24575 151281 9.08% 93.60% # Write request-response latency -system.monitor.writeLatencyHist::24576-26623 83768 5.03% 98.62% # Write request-response latency -system.monitor.writeLatencyHist::26624-28671 15604 0.94% 99.56% # Write request-response latency -system.monitor.writeLatencyHist::28672-30719 6292 0.38% 99.94% # Write request-response latency -system.monitor.writeLatencyHist::30720-32767 1040 0.06% 100.00% # Write request-response latency -system.monitor.writeLatencyHist::32768-34815 0 0.00% 100.00% # Write request-response latency -system.monitor.writeLatencyHist::34816-36863 0 0.00% 100.00% # Write request-response latency -system.monitor.writeLatencyHist::36864-38911 0 0.00% 100.00% # Write request-response latency -system.monitor.writeLatencyHist::38912-40959 0 0.00% 100.00% # Write request-response latency -system.monitor.writeLatencyHist::total 1666878 # Write request-response latency -system.monitor.ittReadRead::samples 1666396 # Read-to-read inter transaction time -system.monitor.ittReadRead::mean 60009.683149 # Read-to-read inter transaction time -system.monitor.ittReadRead::stdev 42949.620471 # Read-to-read inter transaction time -system.monitor.ittReadRead::underflows 0 0.00% 0.00% # Read-to-read inter transaction time -system.monitor.ittReadRead::1-5000 0 0.00% 0.00% # Read-to-read inter transaction time -system.monitor.ittReadRead::5001-10000 0 0.00% 0.00% # Read-to-read inter transaction time -system.monitor.ittReadRead::10001-15000 0 0.00% 0.00% # Read-to-read inter transaction time -system.monitor.ittReadRead::15001-20000 0 0.00% 0.00% # Read-to-read inter transaction time -system.monitor.ittReadRead::20001-25000 0 0.00% 0.00% # Read-to-read inter transaction time -system.monitor.ittReadRead::25001-30000 438119 26.29% 26.29% # Read-to-read inter transaction time -system.monitor.ittReadRead::30001-35000 404012 24.24% 50.54% # Read-to-read inter transaction time -system.monitor.ittReadRead::35001-40000 1 0.00% 50.54% # Read-to-read inter transaction time -system.monitor.ittReadRead::40001-45000 3 0.00% 50.54% # Read-to-read inter transaction time -system.monitor.ittReadRead::45001-50000 3 0.00% 50.54% # Read-to-read inter transaction time -system.monitor.ittReadRead::50001-55000 4 0.00% 50.54% # Read-to-read inter transaction time -system.monitor.ittReadRead::55001-60000 203859 12.23% 62.77% # Read-to-read inter transaction time -system.monitor.ittReadRead::60001-65000 203873 12.23% 75.00% # Read-to-read inter transaction time -system.monitor.ittReadRead::65001-70000 6 0.00% 75.00% # Read-to-read inter transaction time -system.monitor.ittReadRead::70001-75000 2 0.00% 75.01% # Read-to-read inter transaction time -system.monitor.ittReadRead::75001-80000 4 0.00% 75.01% # Read-to-read inter transaction time -system.monitor.ittReadRead::80001-85000 571 0.03% 75.04% # Read-to-read inter transaction time -system.monitor.ittReadRead::85001-90000 102408 6.15% 81.19% # Read-to-read inter transaction time -system.monitor.ittReadRead::90001-95000 102628 6.16% 87.34% # Read-to-read inter transaction time -system.monitor.ittReadRead::95001-100000 570 0.03% 87.38% # Read-to-read inter transaction time -system.monitor.ittReadRead::overflows 210333 12.62% 100.00% # Read-to-read inter transaction time -system.monitor.ittReadRead::min_value 28000 # Read-to-read inter transaction time -system.monitor.ittReadRead::max_value 1130700 # Read-to-read inter transaction time -system.monitor.ittReadRead::total 1666396 # Read-to-read inter transaction time -system.monitor.ittWriteWrite::samples 1666878 # Write-to-write inter transaction time -system.monitor.ittWriteWrite::mean 59391.842015 # Write-to-write inter transaction time -system.monitor.ittWriteWrite::stdev 41837.032784 # Write-to-write inter transaction time -system.monitor.ittWriteWrite::underflows 0 0.00% 0.00% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::1-5000 0 0.00% 0.00% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::5001-10000 0 0.00% 0.00% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::10001-15000 0 0.00% 0.00% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::15001-20000 0 0.00% 0.00% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::20001-25000 0 0.00% 0.00% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::25001-30000 422194 25.33% 25.33% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::30001-35000 420422 25.22% 50.55% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::35001-40000 7 0.00% 50.55% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::40001-45000 3 0.00% 50.55% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::45001-50000 3 0.00% 50.55% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::50001-55000 1 0.00% 50.55% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::55001-60000 208021 12.48% 63.03% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::60001-65000 207862 12.47% 75.50% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::65001-70000 4 0.00% 75.50% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::70001-75000 2 0.00% 75.50% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::75001-80000 2 0.00% 75.50% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::80001-85000 506 0.03% 75.53% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::85001-90000 102058 6.12% 81.65% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::90001-95000 103058 6.18% 87.84% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::95001-100000 512 0.03% 87.87% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::overflows 202223 12.13% 100.00% # Write-to-write inter transaction time -system.monitor.ittWriteWrite::min_value 28000 # Write-to-write inter transaction time -system.monitor.ittWriteWrite::max_value 600949 # Write-to-write inter transaction time -system.monitor.ittWriteWrite::total 1666878 # Write-to-write inter transaction time -system.monitor.ittReqReq::samples 3333275 # Request-to-request inter transaction time -system.monitor.ittReqReq::mean 30000.511852 # Request-to-request inter transaction time -system.monitor.ittReqReq::stdev 1280.006862 # Request-to-request inter transaction time -system.monitor.ittReqReq::underflows 0 0.00% 0.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::1-5000 0 0.00% 0.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::5001-10000 0 0.00% 0.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::10001-15000 0 0.00% 0.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::15001-20000 0 0.00% 0.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::20001-25000 0 0.00% 0.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::25001-30000 1684866 50.55% 50.55% # Request-to-request inter transaction time -system.monitor.ittReqReq::30001-35000 1648324 49.45% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::35001-40000 18 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::40001-45000 13 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::45001-50000 13 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::50001-55000 16 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::55001-60000 16 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::60001-65000 8 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::65001-70000 0 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::70001-75000 0 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::75001-80000 0 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::80001-85000 0 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::85001-90000 0 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::90001-95000 0 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::95001-100000 0 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::overflows 1 0.00% 100.00% # Request-to-request inter transaction time -system.monitor.ittReqReq::min_value 28000 # Request-to-request inter transaction time -system.monitor.ittReqReq::max_value 1041309 # Request-to-request inter transaction time -system.monitor.ittReqReq::total 3333275 # Request-to-request inter transaction time -system.monitor.outstandingReadsHist::samples 100 # Outstanding read transactions -system.monitor.outstandingReadsHist::mean 1.310000 # Outstanding read transactions -system.monitor.outstandingReadsHist::gmean 0 # Outstanding read transactions -system.monitor.outstandingReadsHist::stdev 0.991835 # Outstanding read transactions -system.monitor.outstandingReadsHist::0 20 20.00% 20.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::1 44 44.00% 64.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::2 24 24.00% 88.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::3 9 9.00% 97.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::4 3 3.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::5 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::6 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::7 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::8 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::9 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::10 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::11 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::12 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::13 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::14 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::15 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::16 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::17 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::18 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::19 0 0.00% 100.00% # Outstanding read transactions -system.monitor.outstandingReadsHist::total 100 # Outstanding read transactions -system.monitor.outstandingWritesHist::samples 100 # Outstanding write transactions -system.monitor.outstandingWritesHist::mean 0.380000 # Outstanding write transactions -system.monitor.outstandingWritesHist::gmean 0 # Outstanding write transactions -system.monitor.outstandingWritesHist::stdev 0.487832 # Outstanding write transactions -system.monitor.outstandingWritesHist::0 62 62.00% 62.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::1 38 38.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::2 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::3 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::4 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::5 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::6 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::7 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::8 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::9 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::10 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::11 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::12 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::13 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::14 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::15 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::16 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::17 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::18 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::19 0 0.00% 100.00% # Outstanding write transactions -system.monitor.outstandingWritesHist::total 100 # Outstanding write transactions -system.monitor.readTransHist::samples 100 # Histogram of read transactions per sample period -system.monitor.readTransHist::mean 16663.970000 # Histogram of read transactions per sample period -system.monitor.readTransHist::gmean 16611.784927 # Histogram of read transactions per sample period -system.monitor.readTransHist::stdev 1686.281945 # Histogram of read transactions per sample period -system.monitor.readTransHist::0-2047 0 0.00% 0.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::2048-4095 0 0.00% 0.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::4096-6143 0 0.00% 0.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::6144-8191 0 0.00% 0.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::8192-10239 0 0.00% 0.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::10240-12287 0 0.00% 0.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::12288-14335 0 0.00% 0.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::14336-16383 12 12.00% 12.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::16384-18431 87 87.00% 99.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::18432-20479 0 0.00% 99.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::20480-22527 0 0.00% 99.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::22528-24575 0 0.00% 99.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::24576-26623 0 0.00% 99.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::26624-28671 0 0.00% 99.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::28672-30719 0 0.00% 99.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::30720-32767 0 0.00% 99.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::32768-34815 1 1.00% 100.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::34816-36863 0 0.00% 100.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::36864-38911 0 0.00% 100.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::38912-40959 0 0.00% 100.00% # Histogram of read transactions per sample period -system.monitor.readTransHist::total 100 # Histogram of read transactions per sample period -system.monitor.writeTransHist::samples 100 # Histogram of read transactions per sample period -system.monitor.writeTransHist::mean 16668.790000 # Histogram of read transactions per sample period -system.monitor.writeTransHist::gmean 0 # Histogram of read transactions per sample period -system.monitor.writeTransHist::stdev 1686.323754 # Histogram of read transactions per sample period -system.monitor.writeTransHist::0-1023 1 1.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::1024-2047 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::2048-3071 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::3072-4095 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::4096-5119 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::5120-6143 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::6144-7167 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::7168-8191 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::8192-9215 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::9216-10239 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::10240-11263 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::11264-12287 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::12288-13311 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::13312-14335 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::14336-15359 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::15360-16383 0 0.00% 1.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::16384-17407 99 99.00% 100.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::17408-18431 0 0.00% 100.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::18432-19455 0 0.00% 100.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::19456-20479 0 0.00% 100.00% # Histogram of read transactions per sample period -system.monitor.writeTransHist::total 100 # Histogram of read transactions per sample period +sim_seconds 0.100000 +sim_ticks 100000000000 +final_tick 100000000000 +sim_freq 1000000000000 +host_tick_rate 7892072988 +host_mem_usage 221112 +host_seconds 12.67 +system.clk_domain.voltage_domain.voltage 1 +system.clk_domain.clock 1000 +system.physmem.pwrStateResidencyTicks::UNDEFINED 100000000000 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+system.monitor.writeTransHist::6144-7167 0 0.00% 1.00% +system.monitor.writeTransHist::7168-8191 0 0.00% 1.00% +system.monitor.writeTransHist::8192-9215 0 0.00% 1.00% +system.monitor.writeTransHist::9216-10239 0 0.00% 1.00% +system.monitor.writeTransHist::10240-11263 0 0.00% 1.00% +system.monitor.writeTransHist::11264-12287 0 0.00% 1.00% +system.monitor.writeTransHist::12288-13311 0 0.00% 1.00% +system.monitor.writeTransHist::13312-14335 0 0.00% 1.00% +system.monitor.writeTransHist::14336-15359 0 0.00% 1.00% +system.monitor.writeTransHist::15360-16383 0 0.00% 1.00% +system.monitor.writeTransHist::16384-17407 99 99.00% 100.00% +system.monitor.writeTransHist::17408-18431 0 0.00% 100.00% +system.monitor.writeTransHist::18432-19455 0 0.00% 100.00% +system.monitor.writeTransHist::19456-20479 0 0.00% 100.00% +system.monitor.writeTransHist::total 100 ---------- End Simulation Statistics ---------- diff --git a/tests/quick/se/80.dram-closepage/ref/null/none/dram-lowp/stats.txt b/tests/quick/se/80.dram-closepage/ref/null/none/dram-lowp/stats.txt new file mode 100644 index 000000000..c3a1c10a5 --- /dev/null +++ b/tests/quick/se/80.dram-closepage/ref/null/none/dram-lowp/stats.txt @@ -0,0 +1,20407 @@ + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000250 +sim_ticks 250000000 +final_tick 250000000 +sim_freq 1000000000000 +host_tick_rate 4330044439 +host_mem_usage 91320 +host_seconds 0.06 +system.clk_domain.voltage_domain.voltage 1 +system.clk_domain.clock 500 +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 250000000 +system.mem_ctrls.bytes_read::tgen 631936 +system.mem_ctrls.bytes_read::total 631936 +system.mem_ctrls.num_reads::tgen 9874 +system.mem_ctrls.num_reads::total 9874 +system.mem_ctrls.bw_read::tgen 2527744000 +system.mem_ctrls.bw_read::total 2527744000 +system.mem_ctrls.bw_total::tgen 2527744000 +system.mem_ctrls.bw_total::total 2527744000 +system.mem_ctrls.readReqs 9899 +system.mem_ctrls.writeReqs 0 +system.mem_ctrls.readBursts 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+---------- End Simulation Statistics ---------- + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000250 +sim_ticks 250000000 +final_tick 5750000000 +sim_freq 1000000000000 +host_tick_rate 161132828236 +host_mem_usage 91320 +host_seconds 0.00 +system.clk_domain.voltage_domain.voltage 1 +system.clk_domain.clock 500 +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 250000000 +system.mem_ctrls.bytes_read::tgen 6784 +system.mem_ctrls.bytes_read::total 6784 +system.mem_ctrls.num_reads::tgen 106 +system.mem_ctrls.num_reads::total 106 +system.mem_ctrls.bw_read::tgen 27136000 +system.mem_ctrls.bw_read::total 27136000 +system.mem_ctrls.bw_total::tgen 27136000 +system.mem_ctrls.bw_total::total 27136000 +system.mem_ctrls.readReqs 106 +system.mem_ctrls.writeReqs 0 +system.mem_ctrls.readBursts 106 +system.mem_ctrls.writeBursts 0 +system.mem_ctrls.bytesReadDRAM 6784 +system.mem_ctrls.bytesReadWrQ 0 +system.mem_ctrls.bytesWritten 0 +system.mem_ctrls.bytesReadSys 6784 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+system.monitor.writeTransHist::19 0 +system.monitor.writeTransHist::total 0 +system.tgen.pwrStateResidencyTicks::UNDEFINED 50000000 +system.tgen.numPackets 0 +system.tgen.numRetries 0 +system.tgen.retryTicks 0 + +---------- End Simulation Statistics ---------- diff --git a/tests/quick/se/80.dram-closepage/test.py b/tests/quick/se/80.dram-closepage/test.py new file mode 100644 index 000000000..326c37099 --- /dev/null +++ b/tests/quick/se/80.dram-closepage/test.py @@ -0,0 +1,38 @@ +# Copyright (c) 2017 ARM Limited +# All rights reserved. +# +# The license below extends only to copyright in the software and shall +# not be construed as granting a license to any other intellectual +# property including but not limited to intellectual property relating +# to a hardware implementation of the functionality of the software +# licensed hereunder. You may use the software subject to the license +# terms below provided that you ensure that this notice is replicated +# unmodified and in its entirety in all distributions of the software, +# modified or unmodified, in source code or in binary form. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Radhika Jagtap + +page_policy = 'close_adaptive'
\ No newline at end of file diff --git a/tests/quick/se/80.dram-openpage/ref/null/none/dram-lowp/stats.txt b/tests/quick/se/80.dram-openpage/ref/null/none/dram-lowp/stats.txt new file mode 100644 index 000000000..dbecbf64f --- /dev/null +++ b/tests/quick/se/80.dram-openpage/ref/null/none/dram-lowp/stats.txt @@ -0,0 +1,20459 @@ + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000250 +sim_ticks 250000000 +final_tick 250000000 +sim_freq 1000000000000 +host_tick_rate 3680764416 +host_mem_usage 91320 +host_seconds 0.07 +system.clk_domain.voltage_domain.voltage 1 +system.clk_domain.clock 500 +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 250000000 +system.mem_ctrls.bytes_read::tgen 631872 +system.mem_ctrls.bytes_read::total 631872 +system.mem_ctrls.num_reads::tgen 9873 +system.mem_ctrls.num_reads::total 9873 +system.mem_ctrls.bw_read::tgen 2527488000 +system.mem_ctrls.bw_read::total 2527488000 +system.mem_ctrls.bw_total::tgen 2527488000 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+---------- End Simulation Statistics ---------- + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000250 +sim_ticks 250000000 +final_tick 3750000000 +sim_freq 1000000000000 +host_tick_rate 84181489905 +host_mem_usage 91320 +host_seconds 0.00 +system.clk_domain.voltage_domain.voltage 1 +system.clk_domain.clock 500 +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 250000000 +system.mem_ctrls.bytes_read::tgen 34176 +system.mem_ctrls.bytes_read::total 34176 +system.mem_ctrls.num_reads::tgen 534 +system.mem_ctrls.num_reads::total 534 +system.mem_ctrls.bw_read::tgen 136704000 +system.mem_ctrls.bw_read::total 136704000 +system.mem_ctrls.bw_total::tgen 136704000 +system.mem_ctrls.bw_total::total 136704000 +system.mem_ctrls.readReqs 534 +system.mem_ctrls.writeReqs 0 +system.mem_ctrls.readBursts 534 +system.mem_ctrls.writeBursts 0 +system.mem_ctrls.bytesReadDRAM 34176 +system.mem_ctrls.bytesReadWrQ 0 +system.mem_ctrls.bytesWritten 0 +system.mem_ctrls.bytesReadSys 34176 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+---------- End Simulation Statistics ---------- + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000250 +sim_ticks 250000000 +final_tick 4500000000 +sim_freq 1000000000000 +host_tick_rate 83492302678 +host_mem_usage 91320 +host_seconds 0.00 +system.clk_domain.voltage_domain.voltage 1 +system.clk_domain.clock 500 +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 250000000 +system.mem_ctrls.bytes_read::tgen 33152 +system.mem_ctrls.bytes_read::total 33152 +system.mem_ctrls.num_reads::tgen 518 +system.mem_ctrls.num_reads::total 518 +system.mem_ctrls.bw_read::tgen 132608000 +system.mem_ctrls.bw_read::total 132608000 +system.mem_ctrls.bw_total::tgen 132608000 +system.mem_ctrls.bw_total::total 132608000 +system.mem_ctrls.readReqs 518 +system.mem_ctrls.writeReqs 0 +system.mem_ctrls.readBursts 518 +system.mem_ctrls.writeBursts 0 +system.mem_ctrls.bytesReadDRAM 33152 +system.mem_ctrls.bytesReadWrQ 0 +system.mem_ctrls.bytesWritten 0 +system.mem_ctrls.bytesReadSys 33152 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+system.monitor.writeTransHist::2 0 +system.monitor.writeTransHist::3 0 +system.monitor.writeTransHist::4 0 +system.monitor.writeTransHist::5 0 +system.monitor.writeTransHist::6 0 +system.monitor.writeTransHist::7 0 +system.monitor.writeTransHist::8 0 +system.monitor.writeTransHist::9 0 +system.monitor.writeTransHist::10 0 +system.monitor.writeTransHist::11 0 +system.monitor.writeTransHist::12 0 +system.monitor.writeTransHist::13 0 +system.monitor.writeTransHist::14 0 +system.monitor.writeTransHist::15 0 +system.monitor.writeTransHist::16 0 +system.monitor.writeTransHist::17 0 +system.monitor.writeTransHist::18 0 +system.monitor.writeTransHist::19 0 +system.monitor.writeTransHist::total 0 +system.tgen.pwrStateResidencyTicks::UNDEFINED 50000000 +system.tgen.numPackets 0 +system.tgen.numRetries 0 +system.tgen.retryTicks 0 + +---------- End Simulation Statistics ---------- diff --git a/tests/quick/se/80.dram-openpage/test.py b/tests/quick/se/80.dram-openpage/test.py new file mode 100644 index 000000000..4807480d8 --- /dev/null +++ b/tests/quick/se/80.dram-openpage/test.py @@ -0,0 +1,38 @@ +# Copyright (c) 2017 ARM Limited +# All rights reserved. +# +# The license below extends only to copyright in the software and shall +# not be construed as granting a license to any other intellectual +# property including but not limited to intellectual property relating +# to a hardware implementation of the functionality of the software +# licensed hereunder. You may use the software subject to the license +# terms below provided that you ensure that this notice is replicated +# unmodified and in its entirety in all distributions of the software, +# modified or unmodified, in source code or in binary form. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Radhika Jagtap + +page_policy = 'open_adaptive'
\ No newline at end of file diff --git a/tests/testing/tests.py b/tests/testing/tests.py index 839eb969f..e72ce6815 100755 --- a/tests/testing/tests.py +++ b/tests/testing/tests.py @@ -156,6 +156,7 @@ generic_configs = ( 'memtest-filter', 'tgen-simple-mem', 'tgen-dram-ctrl', + 'dram-lowp', 'learning-gem5-p1-simple', 'learning-gem5-p1-two-level', |