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| author | Kevin Lim <ktlim@umich.edu> | 2006-10-08 01:12:42 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-10-08 01:12:42 -0400 |
| commit | 8949d813ff6f9941faf1b173d408e13b0a2440a7 (patch) | |
| tree | f6be6522df707fc907710a9b234a93fdbe8ca13e /tests | |
| parent | b17421da2059935f7951f3ac963eae7ff6db4a3c (diff) | |
| download | gem5-8949d813ff6f9941faf1b173d408e13b0a2440a7.tar.xz | |
Clean up configs.
configs/common/FSConfig.py:
configs/common/SysPaths.py:
configs/example/fs.py:
configs/example/se.py:
tests/configs/o3-timing-mp.py:
tests/configs/o3-timing.py:
Clean up configs by removing FullO3Config and instead using default values.
src/python/m5/objects/FUPool.py:
Add in default FUPool.
src/python/m5/objects/O3CPU.py:
Use defaults better. Also set checker parameters, and fix up a config bug.
--HG--
extra : convert_revision : 5fd0c000143f4881f10a9a575c3810dc97cb290b
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/configs/o3-timing-mp.py | 3 | ||||
| -rw-r--r-- | tests/configs/o3-timing.py | 3 |
2 files changed, 2 insertions, 4 deletions
diff --git a/tests/configs/o3-timing-mp.py b/tests/configs/o3-timing-mp.py index 881c23156..09935d574 100644 --- a/tests/configs/o3-timing-mp.py +++ b/tests/configs/o3-timing-mp.py @@ -29,7 +29,6 @@ import m5 from m5.objects import * m5.AddToPath('../configs/common') -from FullO3Config import * # -------------------- # Base L1 Cache @@ -54,7 +53,7 @@ class L2(BaseCache): write_buffers = 8 nb_cores = 4 -cpus = [ DetailedO3CPU() for i in xrange(nb_cores) ] +cpus = [ DerivO3CPU() for i in xrange(nb_cores) ] # system simulated system = System(cpu = cpus, physmem = PhysicalMemory(), membus = diff --git a/tests/configs/o3-timing.py b/tests/configs/o3-timing.py index 227e1ba21..0dd7be506 100644 --- a/tests/configs/o3-timing.py +++ b/tests/configs/o3-timing.py @@ -29,7 +29,6 @@ import m5 from m5.objects import * m5.AddToPath('../configs/common') -from FullO3Config import * class MyCache(BaseCache): assoc = 2 @@ -38,7 +37,7 @@ class MyCache(BaseCache): mshrs = 10 tgts_per_mshr = 5 -cpu = DetailedO3CPU() +cpu = DerivO3CPU() cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'), MyCache(size = '2MB')) cpu.mem = cpu.dcache |