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authorAndreas Hansson <andreas.hansson@arm.com>2012-01-30 05:38:24 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2012-01-30 05:38:24 -0500
commitcfc268ad9e5b83cac551cae118811e5c86382d9e (patch)
treea7e24ac6a73e8813a87b7817a3e6b02f44e9c96d /tests
parentef9fc010736df313fbc7acaea3a9b0e2fee33955 (diff)
downloadgem5-cfc268ad9e5b83cac551cae118811e5c86382d9e.tar.xz
MEM: Make the RubyPort physMemPort a PioPort instead of M5Port
This patch makes the physMemPort of the RubyPort a PioPort rather than an M5Port. This reflects the fact that the M5Port and PioPort have different roles. The M5Port is really a coherent slave that is connected to the CPUs and other coherent masters of the system, e.g. DMA ports. The PioPort, on the other hand, is a master port that is connected to the memory and other slaves, for example the pio devices. This simplifies future changes into master/slave ports and is consistent with the port roles throughout the system.
Diffstat (limited to 'tests')
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