arm: Remove the register mapping hack used when copying TCs

In order to see all registers independent of the current CPU mode, the
ARM architecture model uses the magic MISCREG_CPSR_MODE register to
change the register mappings without actually updating the CPU
mode. This hack is no longer needed since the thread context now
provides a flat interface to the register file. This patch replaces
the CPSR_MODE hack with the flat register interface.

1 files changed, 14 insertions, 0 deletions

diff --git a/util/cpt_upgrader.py b/util/cpt_upgrader.py
index 4dbca3fcb..e1f56b3ba 100755
--- a/util/cpt_upgrader.py
+++ b/util/cpt_upgrader.py
@@ -180,6 +180,19 @@ def from_3(cpt):
         for (key, value) in options:
             cpt.set(sec, key, value)
 
+# Version 5 of the checkpoint format removes the MISCREG_CPSR_MODE
+# register from the ARM register file.
+def from_4(cpt):
+    if cpt.get('root','isa') == 'arm':
+        for sec in cpt.sections():
+            import re
+            # Search for all ISA sections
+            if re.search('.*sys.*\.cpu.*\.isa', sec):
+                mr = cpt.get(sec, 'miscRegs').split()
+                # Remove MISCREG_CPSR_MODE
+                del mr[137]
+                cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr))
+
 
 
 migrations = []
@@ -187,6 +200,7 @@ migrations.append(from_0)
 migrations.append(from_1)
 migrations.append(from_2)
 migrations.append(from_3)
+migrations.append(from_4)
 
 verbose_print = False