x86: add tlb checkpointing

This patch adds checkpointing support to x86 tlb. It upgrades the
cpt_upgrader.py script so that previously created checkpoints can
be updated. It moves the checkpoint version to 6.

1 files changed, 15 insertions, 0 deletions

diff --git a/util/cpt_upgrader.py b/util/cpt_upgrader.py
index e1f56b3ba..623c9b297 100755
--- a/util/cpt_upgrader.py
+++ b/util/cpt_upgrader.py
@@ -193,7 +193,21 @@ def from_4(cpt):
                 del mr[137]
                 cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr))
 
+# Version 6 of the checkpoint format adds tlb to x86 checkpoints
+def from_5(cpt):
+    if cpt.get('root','isa') == 'x86':
+        for sec in cpt.sections():
+            import re
+            # Search for all ISA sections
+            if re.search('.*sys.*\.cpu.*\.dtb$', sec):
+                cpt.set(sec, '_size', '0')
+                cpt.set(sec, 'lruSeq', '0')
 
+            if re.search('.*sys.*\.cpu.*\.itb$', sec):
+                cpt.set(sec, '_size', '0')
+                cpt.set(sec, 'lruSeq', '0')
+    else:
+        print "ISA is not x86"
 
 migrations = []
 migrations.append(from_0)
@@ -201,6 +215,7 @@ migrations.append(from_1)
 migrations.append(from_2)
 migrations.append(from_3)
 migrations.append(from_4)
+migrations.append(from_5)
 
 verbose_print = False