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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2019-08-14 19:26:45 +0100
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2019-08-22 08:49:00 +0000
commitf8fbeae6fcd0797a36ccfec615d244b5e6220cd2 (patch)
treecbc2549619ec3f171a0a5cc9ccdb74cc5f2e4d22 /util/cpt_upgrader.py
parentbd8c9614da06899f81fd6d64834db56e4411a728 (diff)
downloadgem5-f8fbeae6fcd0797a36ccfec615d244b5e6220cd2.tar.xz
dev-arm: Start using GITS_CTLR.quiescent bit
The GITS_CTLR.quiescent bit is used by priviledged sw to check when the ITS has finished draining its state (all pending translations/table walks have ended) once it has been disabled (by setting the GITS_CTLR.enable bit to 0). This patch is modelling this behaviour by * Changing the reset state to enable=0, quiescent=1 * Making the GITS_CTLR.quiescent bit RO * Updating the bit once a new translation/command is being processed (quiescent=0) and when there are no pending translation/commands (quiescent=1) Change-Id: I7cfe94b25d603400364b1cdfc2d2397acf5dfad8 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20257 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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