merged with recent commits.

1 files changed, 17 insertions, 0 deletions

diff --git a/util/cpt_upgraders/x86-add-tlb.py b/util/cpt_upgraders/x86-add-tlb.py
new file mode 100644
index 000000000..bd07a100d
--- /dev/null
+++ b/util/cpt_upgraders/x86-add-tlb.py
@@ -0,0 +1,17 @@
+# Add TLB to x86 checkpoints
+def upgrader(cpt):
+    if cpt.get('root','isa') == 'x86':
+        for sec in cpt.sections():
+            import re
+            # Search for all ISA sections
+            if re.search('.*sys.*\.cpu.*\.dtb$', sec):
+                cpt.set(sec, '_size', '0')
+                cpt.set(sec, 'lruSeq', '0')
+
+            if re.search('.*sys.*\.cpu.*\.itb$', sec):
+                cpt.set(sec, '_size', '0')
+                cpt.set(sec, 'lruSeq', '0')
+    else:
+        print "ISA is not x86"
+
+legacy_version = 6