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| author | Ashkan Tousi <ashkan.tousimojarad@arm.com> | 2017-07-10 16:26:22 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-07-27 15:16:30 +0000 |
| commit | e017122e83db2ef3febd4bc241f515b2a0d3f5ef (patch) | |
| tree | 090ccf85ac0d9bd381f84d758425609c94daed01 /util/decode_packet_trace.py | |
| parent | 37d48eac19b6b2d5f857ff868ec6d1de4ea02536 (diff) | |
| download | gem5-e017122e83db2ef3febd4bc241f515b2a0d3f5ef.tar.xz | |
config, arm: Add a high-performance in order timing model
The High-Performance In-order (HPI) CPU timing model is tuned to be
representative of a modern in-order ARMv8-A implementation. The HPI
core and its supporting simulation scripts, namely starter_se.py and
starter_fs.py (under /configs/example/arm/) are part of the ARM
Research Starter Kit on System Modeling. More information can be found
at: http://www.arm.com/ResearchEnablement/SystemModeling
Change-Id: I124bd06ba42d20abff09d447542b031d17eabe22
Signed-off-by: Ashkan Tousi <ashkan.tousimojarad@arm.com>
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/4201
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'util/decode_packet_trace.py')
0 files changed, 0 insertions, 0 deletions