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| author | Andreas Hansson <andreas.hansson@arm.com> | 2016-04-21 04:48:24 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2016-04-21 04:48:24 -0400 |
| commit | b006ad26d45dae3e336d7fc422adab0a330ba24a (patch) | |
| tree | 306fd2f75944fe4ad8f19f0a374d7c72ad97a5cc /util/dram_lat_mem_rd_plot.py | |
| parent | 5a1dea51d2d4e2798eade7bbe3362098fc5f7f91 (diff) | |
| download | gem5-b006ad26d45dae3e336d7fc422adab0a330ba24a.tar.xz | |
stats: Update stats to reflect cache changes
Removed unused stats, now counting WriteLineReq, and changed how
uncacheable writes are handled while responses are outstanding.
Diffstat (limited to 'util/dram_lat_mem_rd_plot.py')
0 files changed, 0 insertions, 0 deletions