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author | Christian Menard <Christian.Menard@tu-dresden.de> | 2017-02-09 19:15:43 -0500 |
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committer | Christian Menard <Christian.Menard@tu-dresden.de> | 2017-02-09 19:15:43 -0500 |
commit | b5045005de6747a5247deb13af9974cfc6b73b08 (patch) | |
tree | ab4c38e4cccfd6a5e1dd9735ce95f226071f9eef /util/dram_lat_mem_rd_plot.py | |
parent | 03f740664bc8db8890359c9c5ad02df9db478bae (diff) | |
download | gem5-b5045005de6747a5247deb13af9974cfc6b73b08.tar.xz |
misc: Clean up and complete the gem5<->SystemC-TLM bridge [7/10]
The current TLM bridge only provides a Slave Port that allows the gem5
world to send request to the SystemC world. This patch series refractors
and cleans up the existing code, and adds a Master Port that allows the
SystemC world to send requests to the gem5 world.
This patch:
* Implement 'pipe through' for gem5 Packets (see explanation below)
Basically, this patch ensures that all transactions that originated in the
gem5 world are converted back to the original packet when entering the gem5
world. So far, this only worked for packets that are responded to by a
SyctemC component (e.g. when a gem5 CPU sends a request to a SystemC
memory). By implementing the 'pipe through' this patch ensures, that
packets that are responded to by a gem5 component (e.g. when a gem5 CPU
sends a request to a gem5 memory via a SystemC interconnect) are handled
properly.
Reviewed at http://reviews.gem5.org/r/3796/
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
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