diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2014-03-23 11:12:01 -0400 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-03-23 11:12:01 -0400 |
commit | 6557741311f28f718cc33f9abde36d7e51f3585c (patch) | |
tree | f5d77bce64a777801d40ef9901cff9b1c17c69c8 /util/fixwhite | |
parent | 7d883df7e58b6e61ed93717f6fde251086d50153 (diff) | |
download | gem5-6557741311f28f718cc33f9abde36d7e51f3585c.tar.xz |
mem: Make DRAM write queue draining more aggressive
This patch changes the triggering condition for the write draining
such that we grab the opportunity to issue writes if there are no
reads waiting (as opposed to waiting for the writes to reach the high
threshold). As a result, we potentially drain some of the writes in read
idle periods (if any).
A low threshold is added to be able to control how many write bursts
are kept in the memory controller queue (acting as on-chip storage).
The high and low thresholds are updated to sensible values for a 32/64
size write buffer. Note that the thresholds should be adjusted along
with the queue sizes.
This patch also adds some basic initialisation sanity checks and moves
part of the initialisation to the constructor.
Diffstat (limited to 'util/fixwhite')
0 files changed, 0 insertions, 0 deletions