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authorAli Saidi <saidi@eecs.umich.edu>2007-02-21 21:06:17 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-02-21 21:06:17 -0500
commit7a2ecf9e268bf10fc0a2406f3a928a661e97b5fd (patch)
tree6ed93c5595ee96386bfea26b5ac5b87c46f706fb /util/m5/m5op.S
parenta329631edbf18d01f5f84b57147bdd69f1e2e6b3 (diff)
downloadgem5-7a2ecf9e268bf10fc0a2406f3a928a661e97b5fd.tar.xz
add pseduo instruction support for sparc
util/m5/Makefile.alpha: Clean up to make it a bit easier to muck with util/m5/Makefile.alpha: Make the makefile more reasonable util/m5/Makefile.alpha: Remove authors from copyright. util/m5/Makefile.alpha: Updated Authors from bk prs info util/m5/Makefile.alpha: bk cp Makefile Makefile.alpha src/arch/sparc/tlb.cc: Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate src/arch/alpha/isa/decoder.isa: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: Rename AlphaPseudo -> PseudoInst since it's all generic src/arch/sparc/isa/bitfields.isa: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/includes.isa: src/arch/sparc/isa/operands.isa: Add support for pseudo instructions in sparc util/m5/Makefile.alpha: util/m5/Makefile.sparc: split off alpha make file and sparc make file for m5 app util/m5/m5.c: ivle and ivlb aren't used anymore util/m5/m5op.h: stdint seems like a more generic better fit here util/m5/m5op_alpha.S: move the op ids into their own header file since we can share them between sparc and alpha --HG-- rename : util/m5/Makefile => util/m5/Makefile.sparc rename : util/m5/m5op.S => util/m5/m5op_alpha.S extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834
Diffstat (limited to 'util/m5/m5op.S')
-rw-r--r--util/m5/m5op.S210
1 files changed, 0 insertions, 210 deletions
diff --git a/util/m5/m5op.S b/util/m5/m5op.S
deleted file mode 100644
index 61e79d5d3..000000000
--- a/util/m5/m5op.S
+++ /dev/null
@@ -1,210 +0,0 @@
-/*
- * Copyright (c) 2003-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Nathan Binkert
- * Ali Saidi
- */
-
-#define m5_op 0x01
-
-#define arm_func 0x00
-#define quiesce_func 0x01
-#define quiescens_func 0x02
-#define quiescecycle_func 0x03
-#define quiescetime_func 0x04
-#define ivlb 0x10 // obsolete
-#define ivle 0x11 // obsolete
-#define exit_old_func 0x20 // deprecated!
-#define exit_func 0x21
-#define initparam_func 0x30
-#define loadsymbol_func 0x31
-#define resetstats_func 0x40
-#define dumpstats_func 0x41
-#define dumprststats_func 0x42
-#define ckpt_func 0x43
-#define readfile_func 0x50
-#define debugbreak_func 0x51
-#define switchcpu_func 0x52
-#define addsymbol_func 0x53
-#define panic_func 0x54
-#define anbegin_func 0x55
-#define anwait_func 0x56
-
-#define INST(op, ra, rb, func) \
- .long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func))
-
-#define LEAF(func) \
- .align 3; \
- .globl func; \
- .ent func; \
-func:
-
-#define RET \
- ret ($26)
-
-#define END(func) \
- .end func
-
-#define ARM(reg) INST(m5_op, reg, 0, arm_func)
-#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
-#define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func)
-#define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func)
-#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
-#define M5EXIT(reg) INST(m5_op, reg, 0, exit_func)
-#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
-#define LOADSYMBOL(reg) INST(m5_op, reg, 0, loadsymbol_func)
-#define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func)
-#define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func)
-#define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func)
-#define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func)
-#define READFILE INST(m5_op, 0, 0, readfile_func)
-#define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func)
-#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
-#define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func)
-#define PANIC INST(m5_op, 0, 0, panic_func)
-#define AN_BEGIN(r1) INST(m5_op, r1, 0, anbegin_func)
-#define AN_WAIT(r1,r2) INST(m5_op, r1, r2, anwait_func)
-
- .set noreorder
-
- .align 4
-LEAF(arm)
- ARM(16)
- RET
-END(arm)
-
- .align 4
-LEAF(quiesce)
- QUIESCE
- RET
-END(quiesce)
-
- .align 4
-LEAF(quiesceNs)
- QUIESCENS(16)
- RET
-END(quiesceNs)
-
- .align 4
-LEAF(quiesceCycle)
- QUIESCECYC(16)
- RET
-END(quiesceCycle)
-
- .align 4
-LEAF(quiesceTime)
- QUIESCETIME
- RET
-END(quiesceTime)
-
- .align 4
-LEAF(m5_exit)
- M5EXIT(16)
- RET
-END(m5_exit)
-
- .align 4
-LEAF(m5_initparam)
- INITPARAM(0)
- RET
-END(m5_initparam)
-
- .align 4
-LEAF(m5_loadsymbol)
- LOADSYMBOL(0)
- RET
-END(m5_loadsymbol)
-
- .align 4
-LEAF(m5_reset_stats)
- RESET_STATS(16, 17)
- RET
-END(m5_reset_stats)
-
- .align 4
-LEAF(m5_dump_stats)
- DUMP_STATS(16, 17)
- RET
-END(m5_dump_stats)
-
- .align 4
-LEAF(m5_dumpreset_stats)
- DUMPRST_STATS(16, 17)
- RET
-END(m5_dumpreset_stats)
-
- .align 4
-LEAF(m5_checkpoint)
- CHECKPOINT(16, 17)
- RET
-END(m5_checkpoint)
-
- .align 4
-LEAF(m5_readfile)
- READFILE
- RET
-END(m5_readfile)
-
- .align 4
-LEAF(m5_debugbreak)
- DEBUGBREAK
- RET
-END(m5_debugbreak)
-
- .align 4
-LEAF(m5_switchcpu)
- SWITCHCPU
- RET
-END(m5_switchcpu)
-
- .align 4
-LEAF(m5_addsymbol)
- ADDSYMBOL(16, 17)
- RET
-END(m5_addsymbol)
-
- .align 4
-LEAF(m5_panic)
- PANIC
- RET
-END(m5_panic)
-
-
- .align 4
-LEAF(m5_anbegin)
- AN_BEGIN(16)
- RET
-END(m5_anbegin)
-
-
- .align 4
-LEAF(m5_anwait)
- AN_WAIT(16,17)
- RET
-END(m5_anwait)
-
-