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authorGedare Bloom <gedare@gwmail.gwu.edu>2011-06-17 12:20:10 -0500
committerGedare Bloom <gedare@gwmail.gwu.edu>2011-06-17 12:20:10 -0500
commit3f1f16703d7d7fafb29fb47415b9aa959fb8eda7 (patch)
treebd3d9493221af378095342a3f8c219fd69739499 /util/m5/m5op_arm.S
parent8b4307f8d863b1805ec0e282bccda23ff4863f16 (diff)
downloadgem5-3f1f16703d7d7fafb29fb47415b9aa959fb8eda7.tar.xz
ARM: Add m5ops and related support for workbegin() and workend() to ARM ISA.
Diffstat (limited to 'util/m5/m5op_arm.S')
-rw-r--r--util/m5/m5op_arm.S4
1 files changed, 4 insertions, 0 deletions
diff --git a/util/m5/m5op_arm.S b/util/m5/m5op_arm.S
index e3c6509e2..b1fb9adc7 100644
--- a/util/m5/m5op_arm.S
+++ b/util/m5/m5op_arm.S
@@ -84,6 +84,8 @@ func:
#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
#define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func)
#define PANIC INST(m5_op, 0, 0, panic_func)
+#define WORK_BEGIN(r1,r2) INST(m5_op, r1, r2, work_begin_func)
+#define WORK_END(r1,r2) INST(m5_op, r1, r2, work_end_func)
#define AN_BSM INST(m5_op, an_bsm, 0, annotate_func)
#define AN_ESM INST(m5_op, an_esm, 0, annotate_func)
@@ -123,6 +125,8 @@ SIMPLE_OP(m5_debugbreak, DEBUGBREAK)
SIMPLE_OP(m5_switchcpu, SWITCHCPU)
SIMPLE_OP(m5_addsymbol, ADDSYMBOL(0, 1))
SIMPLE_OP(m5_panic, PANIC)
+SIMPLE_OP(m5_work_begin, WORK_BEGIN(0,1))
+SIMPLE_OP(m5_work_end, WORK_END(0,1))
SIMPLE_OP(m5a_bsm, AN_BSM)
SIMPLE_OP(m5a_esm, AN_ESM)