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authorAndreas Sandberg <andreas.sandberg@arm.com>2017-07-27 14:59:31 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2017-08-01 18:27:06 +0000
commit644e8cdf5ee7fcfe14faf6404ca42c18282dfceb (patch)
tree3a6bf9cff099992672a6c7952653171bbf1c75b3 /util/m5
parentdb85b8ff32c46796aa91fecb04ea1ae3411c077e (diff)
downloadgem5-644e8cdf5ee7fcfe14faf6404ca42c18282dfceb.tar.xz
util: Move the m5ops.h file to a shared directory
The header file m5ops.h contains a list of constants that should be shared between the simulator and utilities. Move this header file to a new top-level directory for shared files and rename constants to make them suitable for inclusion in the main simulator. The structure of the shared include directory is as follows: include/gem5: Files that can be included from C code. include/gem5/asm: Files that can be included from assembly code. asm/generic/: Files that aren't guest ISA specific asm/${isa}/: Files that are guest ISA specific Change-Id: I1aa511057bcaa80cc2d566109ff26581558c4a41 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jose Marinho <jose.marinho@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4261 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'util/m5')
-rw-r--r--util/m5/Makefile.aarch643
-rw-r--r--util/m5/Makefile.alpha2
-rw-r--r--util/m5/Makefile.arm3
-rw-r--r--util/m5/Makefile.sparc2
-rw-r--r--util/m5/Makefile.thumb4
-rw-r--r--util/m5/Makefile.x862
-rw-r--r--util/m5/m5op_alpha.S72
-rw-r--r--util/m5/m5op_arm.S8
-rw-r--r--util/m5/m5op_arm_A64.S8
-rw-r--r--util/m5/m5op_sparc.S10
-rw-r--r--util/m5/m5op_x86.S48
-rw-r--r--util/m5/m5ops.h144
12 files changed, 82 insertions, 224 deletions
diff --git a/util/m5/Makefile.aarch64 b/util/m5/Makefile.aarch64
index 907ad9434..47abca5f6 100644
--- a/util/m5/Makefile.aarch64
+++ b/util/m5/Makefile.aarch64
@@ -54,7 +54,8 @@ JR=jar
### JDK_PATH must be set to build gem5OpJni
#JDK_PATH=/path/to/jdk/version_number
-CFLAGS=-O2 -I $(JDK_PATH)/include/ -I $(JDK_PATH)/include/linux -march=armv8-a
+CFLAGS=-O2 -I $(JDK_PATH)/include/ -I $(JDK_PATH)/include/linux \
+ -I$(PWD)/../../include -march=armv8-a
LDFLAGS=-static -L. -lm5
LIB_OBJS=m5op_arm_A64.o
diff --git a/util/m5/Makefile.alpha b/util/m5/Makefile.alpha
index e94c2901d..591a06ec7 100644
--- a/util/m5/Makefile.alpha
+++ b/util/m5/Makefile.alpha
@@ -35,7 +35,7 @@ CC=$(CROSS_COMPILE)gcc
AS=$(CROSS_COMPILE)as
LD=$(CROSS_COMPILE)ld
-CFLAGS=-O2
+CFLAGS=-O2 -I$(PWD)/../../include
OBJS=m5.o m5op_alpha.o
all: m5
diff --git a/util/m5/Makefile.arm b/util/m5/Makefile.arm
index ca1bac5c2..3e2842c6b 100644
--- a/util/m5/Makefile.arm
+++ b/util/m5/Makefile.arm
@@ -54,7 +54,8 @@ JR=jar
### JDK_PATH must be set to build gem5OpJni
#JDK_PATH=/path/to/jdk/version_number
-CFLAGS=-O2 -I $(JDK_PATH)/include/ -I $(JDK_PATH)/include/linux -march=armv7-a
+CFLAGS=-O2 -I $(JDK_PATH)/include/ -I $(JDK_PATH)/include/linux \
+ -I$(PWD)/../../include -march=armv7-a
LDFLAGS=-L. -lm5 -static
LIB_OBJS=m5op_arm.o
diff --git a/util/m5/Makefile.sparc b/util/m5/Makefile.sparc
index 76d82857b..b3cb1a6fd 100644
--- a/util/m5/Makefile.sparc
+++ b/util/m5/Makefile.sparc
@@ -35,7 +35,7 @@ CC=$(CROSS_COMPILE)gcc
AS=$(CROSS_COMPILE)as
LD=$(CROSS_COMPILE)ld
-CFLAGS=-O2 -m64
+CFLAGS=-O2 -m64 -I$(PWD)/../../include
OBJS=m5.o m5op_sparc.o
all: m5
diff --git a/util/m5/Makefile.thumb b/util/m5/Makefile.thumb
index 5e34e77af..397b8f7c3 100644
--- a/util/m5/Makefile.thumb
+++ b/util/m5/Makefile.thumb
@@ -49,8 +49,8 @@ AS=$(CROSS_COMPILE)as
LD=$(CROSS_COMPILE)ld
AR=$(CROSS_COMPILE)ar
-#CFLAGS=-O2 -march=armv7 -mthumb
-CFLAGS=-O2 -mthumb
+#CFLAGS=-O2 -march=armv7 -mthumb -I$(PWD)/../../include
+CFLAGS=-O2 -mthumb -I$(PWD)/../../include
LDFLAGS=-L. -lm5
OBJS=m5.o
diff --git a/util/m5/Makefile.x86 b/util/m5/Makefile.x86
index 326120298..5ea29ccaa 100644
--- a/util/m5/Makefile.x86
+++ b/util/m5/Makefile.x86
@@ -31,7 +31,7 @@ CC=gcc
AS=as
LD=ld
-CFLAGS=-O2 -DM5OP_ADDR=0xFFFF0000
+CFLAGS=-O2 -DM5OP_ADDR=0xFFFF0000 -I$(PWD)/../../include
OBJS=m5.o m5op_x86.o
all: m5
diff --git a/util/m5/m5op_alpha.S b/util/m5/m5op_alpha.S
index 9e8c49338..91e1d5353 100644
--- a/util/m5/m5op_alpha.S
+++ b/util/m5/m5op_alpha.S
@@ -31,7 +31,7 @@
#define m5_op 0x01
-#include "m5ops.h"
+#include <gem5/asm/generic/m5ops.h>
#define INST(op, ra, rb, func) \
.long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func))
@@ -54,42 +54,42 @@ func:
RET; \
END(_f)
-#define ARM(reg) INST(m5_op, reg, 0, arm_func)
-#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
-#define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func)
-#define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func)
-#define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
-#define RPNS INST(m5_op, 0, 0, rpns_func)
-#define WAKE_CPU(r1) INST(m5_op, r1, 0, wakecpu_func)
-#define M5EXIT(reg) INST(m5_op, reg, 0, exit_func)
-#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
-#define LOADSYMBOL(reg) INST(m5_op, reg, 0, loadsymbol_func)
-#define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func)
-#define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func)
-#define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func)
-#define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func)
-#define READFILE INST(m5_op, 0, 0, readfile_func)
-#define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func)
-#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
-#define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func)
-#define PANIC INST(m5_op, 0, 0, panic_func)
+#define ARM(reg) INST(m5_op, reg, 0, M5OP_ARM)
+#define QUIESCE INST(m5_op, 0, 0, M5OP_QUIESCE)
+#define QUIESCENS(r1) INST(m5_op, r1, 0, M5OP_QUIESCE_NS)
+#define QUIESCECYC(r1) INST(m5_op, r1, 0, M5OP_QUIESCE_CYCLE)
+#define QUIESCETIME INST(m5_op, 0, 0, M5OP_QUIESCE_TIME)
+#define RPNS INST(m5_op, 0, 0, M5OP_RPNS)
+#define WAKE_CPU(r1) INST(m5_op, r1, 0, M5OP_WAKE_CPU)
+#define M5EXIT(reg) INST(m5_op, reg, 0, M5OP_EXIT)
+#define INITPARAM(reg) INST(m5_op, reg, 0, M5OP_INIT_PARAM)
+#define LOADSYMBOL(reg) INST(m5_op, reg, 0, M5OP_LOAD_SYMBOL)
+#define RESET_STATS(r1, r2) INST(m5_op, r1, r2, M5OP_RESET_STATS)
+#define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, M5OP_DUMP_STATS)
+#define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, M5OP_DUMP_RESET_STATS)
+#define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, M5OP_CHECKPOINT)
+#define READFILE INST(m5_op, 0, 0, M5OP_READ_FILE)
+#define DEBUGBREAK INST(m5_op, 0, 0, M5OP_DEBUG_BREAK)
+#define SWITCHCPU INST(m5_op, 0, 0, M5OP_SWITCH_CPU)
+#define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, M5OP_ADD_SYMBOL)
+#define PANIC INST(m5_op, 0, 0, M5OP_PANIC)
-#define AN_BSM INST(m5_op, an_bsm, 0, annotate_func)
-#define AN_ESM INST(m5_op, an_esm, 0, annotate_func)
-#define AN_BEGIN INST(m5_op, an_begin, 0, annotate_func)
-#define AN_END INST(m5_op, an_end, 0, annotate_func)
-#define AN_Q INST(m5_op, an_q, 0, annotate_func)
-#define AN_RQ INST(m5_op, an_rq, 0, annotate_func)
-#define AN_DQ INST(m5_op, an_dq, 0, annotate_func)
-#define AN_WF INST(m5_op, an_wf, 0, annotate_func)
-#define AN_WE INST(m5_op, an_we, 0, annotate_func)
-#define AN_WS INST(m5_op, an_ws, 0, annotate_func)
-#define AN_SQ INST(m5_op, an_sq, 0, annotate_func)
-#define AN_AQ INST(m5_op, an_aq, 0, annotate_func)
-#define AN_PQ INST(m5_op, an_pq, 0, annotate_func)
-#define AN_L INST(m5_op, an_l, 0, annotate_func)
-#define AN_IDENTIFY INST(m5_op, an_identify, 0, annotate_func)
-#define AN_GETID INST(m5_op, an_getid, 0, annotate_func)
+#define AN_BSM INST(m5_op, M5OP_AN_BSM, 0, M5OP_ANNOTATE)
+#define AN_ESM INST(m5_op, M5OP_AN_ESM, 0, M5OP_ANNOTATE)
+#define AN_BEGIN INST(m5_op, M5OP_AN_BEGIN, 0, M5OP_ANNOTATE)
+#define AN_END INST(m5_op, M5OP_AN_END, 0, M5OP_ANNOTATE)
+#define AN_Q INST(m5_op, M5OP_AN_Q, 0, M5OP_ANNOTATE)
+#define AN_RQ INST(m5_op, M5OP_AN_RQ, 0, M5OP_ANNOTATE)
+#define AN_DQ INST(m5_op, M5OP_AN_DQ, 0, M5OP_ANNOTATE)
+#define AN_WF INST(m5_op, M5OP_AN_WF, 0, M5OP_ANNOTATE)
+#define AN_WE INST(m5_op, M5OP_AN_WE, 0, M5OP_ANNOTATE)
+#define AN_WS INST(m5_op, M5OP_AN_WS, 0, M5OP_ANNOTATE)
+#define AN_SQ INST(m5_op, M5OP_AN_SQ, 0, M5OP_ANNOTATE)
+#define AN_AQ INST(m5_op, M5OP_AN_AQ, 0, M5OP_ANNOTATE)
+#define AN_PQ INST(m5_op, M5OP_AN_PQ, 0, M5OP_ANNOTATE)
+#define AN_L INST(m5_op, M5OP_AN_L, 0, M5OP_ANNOTATE)
+#define AN_IDENTIFY INST(m5_op, M5OP_AN_IDENTIFY, 0, M5OP_ANNOTATE)
+#define AN_GETID INST(m5_op, M5OP_AN_GETID, 0, M5OP_ANNOTATE)
.set noreorder
diff --git a/util/m5/m5op_arm.S b/util/m5/m5op_arm.S
index 6a6eafa1c..bff36d442 100644
--- a/util/m5/m5op_arm.S
+++ b/util/m5/m5op_arm.S
@@ -47,7 +47,7 @@
.thumb
#endif
-#include "m5ops.h"
+#include <gem5/asm/generic/m5ops.h>
.text
@@ -66,7 +66,7 @@
.text
#define M5OP(name, func, subfunc) m5op_func name, func, subfunc
- FOREACH_M5OP
+ M5OP_FOREACH
-#define M5_ANNOTATION(name, ann) m5op_func name, annotate_func, ann
- FOREACH_M5_ANNOTATION
+#define M5_ANNOTATION(name, ann) m5op_func name, M5OP_ANNOTATE, ann
+ M5OP_FOREACH_ANNOTATION
diff --git a/util/m5/m5op_arm_A64.S b/util/m5/m5op_arm_A64.S
index f17c803d0..0076cf8ef 100644
--- a/util/m5/m5op_arm_A64.S
+++ b/util/m5/m5op_arm_A64.S
@@ -43,7 +43,7 @@
* Andreas Sandberg
*/
-#include "m5ops.h"
+#include <gem5/asm/generic/m5ops.h>
#ifdef M5OP_ADDR
.macro m5op_func, name, func, subfunc
@@ -65,7 +65,7 @@
.text
#define M5OP(name, func, subfunc) m5op_func name, func, subfunc
- FOREACH_M5OP
+ M5OP_FOREACH
-#define M5_ANNOTATION(name, ann) m5op_func name, annotate_func, ann
- FOREACH_M5_ANNOTATION
+#define M5_ANNOTATION(name, ann) m5op_func name, M5OP_ANNOTATE, ann
+ M5OP_FOREACH_ANNOTATION
diff --git a/util/m5/m5op_sparc.S b/util/m5/m5op_sparc.S
index 40248ff8b..ba8f6841f 100644
--- a/util/m5/m5op_sparc.S
+++ b/util/m5/m5op_sparc.S
@@ -32,7 +32,7 @@
#define m5_op 0x2
#define m5_op3 0x37
-#include "m5ops.h"
+#include <gem5/asm/generic/m5ops.h>
#define INST(func, rs1, rs2, rd) \
.long (m5_op) << 30 | (rd) << 25 | (m5_op3) << 19 | (func) << 7 | \
@@ -49,10 +49,10 @@ func:
#define END(func) \
.size func, (.-func)
-#define DEBUGBREAK INST(debugbreak_func, 0, 0, 0)
-#define M5EXIT INST(exit_func, 0, 0, 0)
-#define PANIC INST(panic_func, 0, 0, 0)
-#define READFILE INST(readfile_func, 0, 0, 0)
+#define DEBUGBREAK INST(M5OP_DEBUG_BREAK, 0, 0, 0)
+#define M5EXIT INST(M5OP_EXIT, 0, 0, 0)
+#define PANIC INST(M5OP_PANIC, 0, 0, 0)
+#define READFILE INST(M5OP_READ_FILE, 0, 0, 0)
LEAF(m5_exit)
retl
diff --git a/util/m5/m5op_x86.S b/util/m5/m5op_x86.S
index f38803a25..c09e51e25 100644
--- a/util/m5/m5op_x86.S
+++ b/util/m5/m5op_x86.S
@@ -30,7 +30,7 @@
* Ali Saidi
*/
-#include "m5ops.h"
+#include <gem5/asm/generic/m5ops.h>
#ifdef M5OP_ADDR
/* Use the memory mapped m5op interface */
@@ -61,26 +61,26 @@ name: \
#endif
-TWO_BYTE_OP(arm, arm_func)
-TWO_BYTE_OP(quiesce, quiesce_func)
-TWO_BYTE_OP(quiesceNs, quiescens_func)
-TWO_BYTE_OP(quiesceCycle, quiescecycle_func)
-TWO_BYTE_OP(quiesceTime, quiescetime_func)
-TWO_BYTE_OP(rpns, rpns_func)
-TWO_BYTE_OP(m5_exit, exit_func)
-TWO_BYTE_OP(m5_fail, fail_func)
-TWO_BYTE_OP(m5_initparam, initparam_func)
-TWO_BYTE_OP(m5_loadsymbol, loadsymbol_func)
-TWO_BYTE_OP(m5_reset_stats, resetstats_func)
-TWO_BYTE_OP(m5_dump_stats, dumpstats_func)
-TWO_BYTE_OP(m5_dumpreset_stats, dumprststats_func)
-TWO_BYTE_OP(m5_checkpoint, ckpt_func)
-TWO_BYTE_OP(m5_readfile, readfile_func)
-TWO_BYTE_OP(m5_writefile, writefile_func)
-TWO_BYTE_OP(m5_debugbreak, debugbreak_func)
-TWO_BYTE_OP(m5_switchcpu, switchcpu_func)
-TWO_BYTE_OP(m5_addsymbol, addsymbol_func)
-TWO_BYTE_OP(m5_panic, panic_func)
-TWO_BYTE_OP(m5_work_begin, work_begin_func)
-TWO_BYTE_OP(m5_work_end, work_end_func)
-TWO_BYTE_OP(m5_togglesync, togglesync_func)
+TWO_BYTE_OP(arm, M5OP_ARM)
+TWO_BYTE_OP(quiesce, M5OP_QUIESCE)
+TWO_BYTE_OP(quiesceNs, M5OP_QUIESCE_NS)
+TWO_BYTE_OP(quiesceCycle, M5OP_QUIESCE_CYCLE)
+TWO_BYTE_OP(quiesceTime, M5OP_QUIESCE_TIME)
+TWO_BYTE_OP(rpns, M5OP_RPNS)
+TWO_BYTE_OP(m5_exit, M5OP_EXIT)
+TWO_BYTE_OP(m5_fail, M5OP_FAIL)
+TWO_BYTE_OP(m5_initparam, M5OP_INIT_PARAM)
+TWO_BYTE_OP(m5_loadsymbol, M5OP_LOAD_SYMBOL)
+TWO_BYTE_OP(m5_reset_stats, M5OP_RESET_STATS)
+TWO_BYTE_OP(m5_dump_stats, M5OP_DUMP_STATS)
+TWO_BYTE_OP(m5_dumpreset_stats, M5OP_DUMP_RESET_STATS)
+TWO_BYTE_OP(m5_checkpoint, M5OP_CHECKPOINT)
+TWO_BYTE_OP(m5_readfile, M5OP_READ_FILE)
+TWO_BYTE_OP(m5_writefile, M5OP_WRITE_FILE)
+TWO_BYTE_OP(m5_debugbreak, M5OP_DEBUG_BREAK)
+TWO_BYTE_OP(m5_switchcpu, M5OP_SWITCH_CPU)
+TWO_BYTE_OP(m5_addsymbol, M5OP_ADD_SYMBOL)
+TWO_BYTE_OP(m5_panic, M5OP_PANIC)
+TWO_BYTE_OP(m5_work_begin, M5OP_WORK_BEGIN)
+TWO_BYTE_OP(m5_work_end, M5OP_WORK_END)
+TWO_BYTE_OP(m5_togglesync, M5OP_DIST_TOGGLE_SYNC)
diff --git a/util/m5/m5ops.h b/util/m5/m5ops.h
deleted file mode 100644
index 99dc81251..000000000
--- a/util/m5/m5ops.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * Copyright (c) 2016 ARM Limited
- * All rights reserved
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Copyright (c) 2003-2006 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Nathan Binkert
- * Ali Saidi
- * Andreas Sandberg
- */
-
-#define arm_func 0x00
-#define quiesce_func 0x01
-#define quiescens_func 0x02
-#define quiescecycle_func 0x03
-#define quiescetime_func 0x04
-#define rpns_func 0x07
-#define wakecpu_func 0x09
-#define deprecated1_func 0x10 // obsolete ivlb
-#define deprecated2_func 0x11 // obsolete ivle
-#define deprecated3_func 0x20 // deprecated exit function
-#define exit_func 0x21
-#define fail_func 0x22
-#define initparam_func 0x30
-#define loadsymbol_func 0x31
-#define resetstats_func 0x40
-#define dumpstats_func 0x41
-#define dumprststats_func 0x42
-#define ckpt_func 0x43
-#define writefile_func 0x4F
-#define readfile_func 0x50
-#define debugbreak_func 0x51
-#define switchcpu_func 0x52
-#define addsymbol_func 0x53
-#define panic_func 0x54
-
-#define reserved2_func 0x56 // Reserved for user
-#define reserved3_func 0x57 // Reserved for user
-#define reserved4_func 0x58 // Reserved for user
-#define reserved5_func 0x59 // Reserved for user
-
-#define work_begin_func 0x5a
-#define work_end_func 0x5b
-
-#define syscall_func 0x60 // Reserved for user
-#define pagefault_func 0x61 // Reserved for user
-#define togglesync_func 0x62
-
-// These operations are for critical path annotation
-#define annotate_func 0x55
-#define an_bsm 0x1
-#define an_esm 0x2
-#define an_begin 0x3
-#define an_end 0x4
-#define an_q 0x6
-#define an_dq 0x7
-#define an_wf 0x8
-#define an_we 0x9
-#define an_rq 0xA
-#define an_ws 0xB
-#define an_sq 0xC
-#define an_aq 0xD
-#define an_pq 0xE
-#define an_l 0xF
-#define an_identify 0x10
-#define an_getid 0x11
-
-
-#define FOREACH_M5OP \
- M5OP(arm, arm_func, 0); \
- M5OP(quiesce, quiesce_func, 0); \
- M5OP(quiesceNs, quiescens_func, 0); \
- M5OP(quiesceCycle, quiescecycle_func, 0); \
- M5OP(quiesceTime, quiescetime_func, 0); \
- M5OP(rpns, rpns_func, 0); \
- M5OP(wakeCPU, wakecpu_func, 0); \
- M5OP(m5_exit, exit_func, 0); \
- M5OP(m5_fail, fail_func, 0); \
- M5OP(m5_initparam, initparam_func, 0); \
- M5OP(m5_loadsymbol, loadsymbol_func, 0); \
- M5OP(m5_reset_stats, resetstats_func, 0); \
- M5OP(m5_dump_stats, dumpstats_func, 0); \
- M5OP(m5_dumpreset_stats, dumprststats_func, 0); \
- M5OP(m5_checkpoint, ckpt_func, 0); \
- M5OP(m5_readfile, readfile_func, 0); \
- M5OP(m5_writefile, writefile_func, 0); \
- M5OP(m5_debugbreak, debugbreak_func, 0); \
- M5OP(m5_switchcpu, switchcpu_func, 0); \
- M5OP(m5_addsymbol, addsymbol_func, 0); \
- M5OP(m5_panic, panic_func, 0); \
- M5OP(m5_work_begin, work_begin_func, 0); \
- M5OP(m5_work_end, work_end_func, 0); \
- M5OP(m5_togglesync, togglesync_func, 0);
-
-#define FOREACH_M5_ANNOTATION \
- M5_ANNOTATION(m5a_bsm, an_bsm); \
- M5_ANNOTATION(m5a_esm, an_esm); \
- M5_ANNOTATION(m5a_begin, an_begin); \
- M5_ANNOTATION(m5a_end, an_end); \
- M5_ANNOTATION(m5a_q, an_q); \
- M5_ANNOTATION(m5a_dq, an_dq); \
- M5_ANNOTATION(m5a_wf, an_wf); \
- M5_ANNOTATION(m5a_we, an_we); \
- M5_ANNOTATION(m5a_rq, an_rq); \
- M5_ANNOTATION(m5a_ws, an_ws); \
- M5_ANNOTATION(m5a_sq, an_sq); \
- M5_ANNOTATION(m5a_aq, an_aq); \
- M5_ANNOTATION(m5a_pq, an_pq); \
- M5_ANNOTATION(m5a_l, an_l); \
- M5_ANNOTATION(m5a_identify, an_identify); \
- M5_ANNOTATION(m5a_getid, an_getid);