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authorAli Saidi <saidi@eecs.umich.edu>2006-09-11 17:57:20 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-09-11 17:57:20 -0400
commit46502851abffd70328ef605b1fa6056f873848e9 (patch)
treec4572be025f11ac96b7ab6ed27317e8430498962 /util/m5
parent8bc3c2b19231df072fbc6d5dd29db612fff407dd (diff)
downloadgem5-46502851abffd70328ef605b1fa6056f873848e9.tar.xz
add annotation code to m5
configs/common/Benchmarks.py: add annotate test app src/SConscript: add annotate.cc to lis src/arch/alpha/isa/decoder.isa: add annotate instructions src/base/traceflags.py: Add annotate trace flag src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: add annotate pseudo ops util/m5/m5op.S: util/m5/m5op.h: add anotate ops --HG-- extra : convert_revision : 7f965c0d84e41ce34f2ec8ec27a009276d67d8d6
Diffstat (limited to 'util/m5')
-rw-r--r--util/m5/m5op.S18
-rw-r--r--util/m5/m5op.h2
2 files changed, 20 insertions, 0 deletions
diff --git a/util/m5/m5op.S b/util/m5/m5op.S
index a55532c90..5c0212189 100644
--- a/util/m5/m5op.S
+++ b/util/m5/m5op.S
@@ -50,6 +50,8 @@
#define switchcpu_func 0x52
#define addsymbol_func 0x53
#define panic_func 0x54
+#define anbegin_func 0x55
+#define anwait_func 0x56
#define INST(op, ra, rb, func) \
.long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func))
@@ -84,6 +86,8 @@ func:
#define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
#define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func)
#define PANIC INST(m5_op, 0, 0, panic_func)
+#define AN_BEGIN(r1) INST(m5_op, r1, 0, anbegin_func)
+#define AN_WAIT(r1,r2) INST(m5_op, r1, r2, anwait_func)
.set noreorder
@@ -197,3 +201,17 @@ LEAF(m5_panic)
END(m5_panic)
+ .align 4
+LEAF(m5_anbegin)
+ AN_BEGIN(16)
+ RET
+END(m5_anbegin)
+
+
+ .align 4
+LEAF(m5_anwait)
+ AN_WAIT(16,17)
+ RET
+END(m5_anwait)
+
+
diff --git a/util/m5/m5op.h b/util/m5/m5op.h
index f96c5097a..eab4e7fd5 100644
--- a/util/m5/m5op.h
+++ b/util/m5/m5op.h
@@ -53,5 +53,7 @@ void m5_debugbreak(void);
void m5_switchcpu(void);
void m5_addsymbol(uint64_t addr, char *symbol);
void m5_panic(void);
+void m5_anbegin(uint64_t s);
+void m5_anwait(uint64_t s, uint64_t w);
#endif // __M5OP_H__