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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2003-11-03 20:26:51 -0800 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2003-11-03 20:26:51 -0800 |
| commit | 40b9a3878aed4e2400727ca87e1c9976cdecef58 (patch) | |
| tree | 8c24cf73c21f2ff6ef3ce0d3df212071ebe77508 /util/m5 | |
| parent | dc8370852f59f881a37161ea335573616dbd17b3 (diff) | |
| download | gem5-40b9a3878aed4e2400727ca87e1c9976cdecef58.tar.xz | |
Minor changes to instruction trace output.
arch/alpha/isa_desc:
A few disassembly changes to make it easier to compare with old machine.def traces:
- Make lds prefetches print f31 instead of r31 as dest.
- Don't print mode suffixes on FP if SS_COMPATIBLE_DISASSEMBLY
cpu/exetrace.cc:
Left-justify instruction in field, and increase width by 1.
--HG--
extra : convert_revision : 9ffd56728f1bb772aa3ccda5f027b93d4c3a4135
Diffstat (limited to 'util/m5')
0 files changed, 0 insertions, 0 deletions