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authorAli Saidi <saidi@eecs.umich.edu>2006-12-27 14:35:23 -0500
committerAli Saidi <saidi@eecs.umich.edu>2006-12-27 14:35:23 -0500
commitff88f3b13ab03b1d6e8f371298843cd3b4d0b8cb (patch)
tree3d6fe8dc263d43ca862d4ea23a1b74de51e33936 /util/pbs/pbs.py
parentb6dc902f6acfd6cb855f73f97cbaf721c1b24a43 (diff)
downloadgem5-ff88f3b13ab03b1d6e8f371298843cd3b4d0b8cb.tar.xz
Compare legion and m5 tlbs for differences
Only print faults instructions that aren't traps or faulting loads src/cpu/exetrace.cc: Compare the legion and m5 tlbs and printout any differences Only show differences if the instruction isn't a trap and isn't a memory operation that changes the trap level (a fault) src/cpu/m5legion_interface.h: update the m5<->legion interface to add tlb data --HG-- extra : convert_revision : 6963b64ca1012604e6b1d3c5e0e5f5282fd0164e
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