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| author | Ali Saidi <saidi@eecs.umich.edu> | 2006-09-18 20:12:45 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-09-18 20:12:45 -0400 |
| commit | 17b0e9714d4bde7462d4663899bb9498027f6b40 (patch) | |
| tree | 464a837d850eb8e076e62d9a6926e9e57516b9d9 /util/regress | |
| parent | b7d03951268d352254b918fbe1464954828ee8fd (diff) | |
| download | gem5-17b0e9714d4bde7462d4663899bb9498027f6b40.tar.xz | |
add boiler plate intel nic code
src/SConscript:
add intel nic to sconscript
src/dev/pcidev.cc:
fix bug with subsystemid value
src/python/m5/objects/Ethernet.py:
add intel nic to ethernet.py
src/python/m5/objects/Ide.py:
src/python/m5/objects/Pci.py:
Move config_latency into pci where it belogs
--HG--
extra : convert_revision : 7163aaf7b4098496518b0910cef62f2ce3dd574d
Diffstat (limited to 'util/regress')
0 files changed, 0 insertions, 0 deletions