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authorGabe Black <gblack@eecs.umich.edu>2006-10-18 20:52:34 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-10-18 20:52:34 -0400
commitbb2ab310ebe6b9f9313c9af103312d2b99e09574 (patch)
tree120bb7b00b460a3fde61b577368e30b2ea06a8d5 /util/statetrace/arch/tracechild_sparc.hh
parent849d5e2efb24c177bb15a6c4d2c5e3a6a8dba349 (diff)
downloadgem5-bb2ab310ebe6b9f9313c9af103312d2b99e09574.tar.xz
Fixed up exetrace.cc to deal with microcode, and to made floating point register numbers correlate to the numbers used in SPARC in m5 and statetrace.
src/cpu/exetrace.cc: Fixed up to deal with microcode, and to make floating point register numbers correlate to the numbers used in SPARC. util/statetrace/arch/tracechild_sparc.cc: util/statetrace/arch/tracechild_sparc.hh: Make floating point register numbers correlate to the numbers used in SPARC. --HG-- extra : convert_revision : 878897292f696092453cf61d6eac2d1c407ca13b
Diffstat (limited to 'util/statetrace/arch/tracechild_sparc.hh')
-rw-r--r--util/statetrace/arch/tracechild_sparc.hh8
1 files changed, 4 insertions, 4 deletions
diff --git a/util/statetrace/arch/tracechild_sparc.hh b/util/statetrace/arch/tracechild_sparc.hh
index d177d5941..80770211a 100644
--- a/util/statetrace/arch/tracechild_sparc.hh
+++ b/util/statetrace/arch/tracechild_sparc.hh
@@ -57,10 +57,10 @@ public:
//Input registers
I0, I1, I2, I3, I4, I5, I6, I7,
//Floating point
- F0, F1, F2, F3, F4, F5, F6, F7,
- F8, F9, F10, F11, F12, F13, F14, F15,
- F16, F17, F18, F19, F20, F21, F22, F23,
- F24, F25, F26, F27, F28, F29, F30, F31,
+ F0, F2, F4, F6, F8, F10, F12, F14,
+ F16, F18, F20, F22, F24, F26, F28, F30,
+ F32, F34, F36, F38, F40, F42, F44, F46,
+ F48, F50, F52, F54, F56, F58, F60, F62,
//Miscelaneous
FSR, FPRS, PC, NPC, Y, CWP, PSTATE, ASI, CCR,
numregs