diff options
author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-04 20:38:26 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-04 20:38:26 -0500 |
commit | 48f7fda706b854f053d66df5e14e0084df775910 (patch) | |
tree | 7a2c8ecf89e5c4530ada1453cfe756edaa8799be /util/statetrace/arch | |
parent | 632cf8dd80f29f85097aa90cd704ca01cc57ff39 (diff) | |
download | gem5-48f7fda706b854f053d66df5e14e0084df775910.tar.xz |
ARM: Add vfpv3 support to native trace.
Diffstat (limited to 'util/statetrace/arch')
-rw-r--r-- | util/statetrace/arch/arm/tracechild.cc | 45 | ||||
-rw-r--r-- | util/statetrace/arch/arm/tracechild.hh | 15 |
2 files changed, 53 insertions, 7 deletions
diff --git a/util/statetrace/arch/arm/tracechild.cc b/util/statetrace/arch/arm/tracechild.cc index 5dde3d567..79670bc8b 100644 --- a/util/statetrace/arch/arm/tracechild.cc +++ b/util/statetrace/arch/arm/tracechild.cc @@ -56,23 +56,28 @@ ARMTraceChild::ARMTraceChild() { foundMvn = false; + memset(®s, 0, sizeof(regs)); + memset(&oldregs, 0, sizeof(regs)); + memset(&fpregs, 0, sizeof(vfp_regs)); + memset(&oldfpregs, 0, sizeof(vfp_regs)); + for (int x = 0; x < numregs; x++) { - memset(®s, 0, sizeof(regs)); - memset(&oldregs, 0, sizeof(regs)); regDiffSinceUpdate[x] = false; } + + assert(sizeof(regs.uregs)/sizeof(regs.uregs[0]) > CPSR); } bool ARMTraceChild::sendState(int socket) { uint32_t regVal = 0; - uint32_t message[numregs + 1]; + uint64_t message[numregs + 1]; int pos = 1; message[0] = 0; for (int x = 0; x < numregs; x++) { if (regDiffSinceUpdate[x]) { - message[0] = message[0] | (1 << x); + message[0] = message[0] | (1ULL << x); message[pos++] = getRegVal(x); } } @@ -97,10 +102,21 @@ ARMTraceChild::sendState(int socket) uint32_t ARMTraceChild::getRegs(user_regs &myregs, int num) { - assert(num < numregs && num >= 0); + assert(num <= CPSR && num >= 0); return myregs.uregs[num]; } +uint64_t +ARMTraceChild::getFpRegs(vfp_regs &my_fp_regs, int num) +{ + assert(num >= F0 && num < numregs); + if (num == FPSCR) + return my_fp_regs.fpscr; + + num -= F0; + return my_fp_regs.fpregs[num]; +} + bool ARMTraceChild::update(int pid) { @@ -110,21 +126,36 @@ ARMTraceChild::update(int pid) return false; } + const uint32_t get_vfp_regs = 32; + + oldfpregs = fpregs; + if (ptrace((__ptrace_request)get_vfp_regs, pid, 0, &fpregs) != 0) { + cerr << "update: " << strerror(errno) << endl; + return false; + } + for (unsigned int x = 0; x < numregs; x++) regDiffSinceUpdate[x] = (getRegVal(x) != getOldRegVal(x)); + return true; } int64_t ARMTraceChild::getRegVal(int num) { - return getRegs(regs, num); + if (num <= CPSR) + return getRegs(regs, num); + else + return (int64_t)getFpRegs(fpregs, num); } int64_t ARMTraceChild::getOldRegVal(int num) { - return getRegs(oldregs, num); + if (num <= CPSR) + return getRegs(oldregs, num); + else + return (int64_t)getFpRegs(oldfpregs, num); } ostream & diff --git a/util/statetrace/arch/arm/tracechild.hh b/util/statetrace/arch/arm/tracechild.hh index 9a4dc1921..06d7b0d4f 100644 --- a/util/statetrace/arch/arm/tracechild.hh +++ b/util/statetrace/arch/arm/tracechild.hh @@ -67,12 +67,27 @@ class ARMTraceChild : public TraceChild R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, FP, R12, SP, LR, PC, CPSR, + F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15, + F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, + F30, F31, FPSCR, numregs }; + + struct vfp_regs { + uint64_t fpregs[32]; + uint32_t fpscr; + }; + private: uint32_t getRegs(user_regs& myregs, int num); + uint64_t getFpRegs(vfp_regs &myfpregs, int num); + user_regs regs; user_regs oldregs; + + vfp_regs fpregs; + vfp_regs oldfpregs; + bool regDiffSinceUpdate[numregs]; bool foundMvn; |