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author | Binh Pham <binhpham@cs.rutgers.edu> | 2014-06-21 10:26:55 -0700 |
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committer | Binh Pham <binhpham@cs.rutgers.edu> | 2014-06-21 10:26:55 -0700 |
commit | b72c8798682d307adfe9c1c2a77ac5a6d6240c15 (patch) | |
tree | 0c3c1ad306709bd44d07f9eaca3dac63809f5409 /util/statetrace | |
parent | 0782d92286ded450b7e615fefbd5d6d5e738c8cd (diff) | |
download | gem5-b72c8798682d307adfe9c1c2a77ac5a6d6240c15.tar.xz |
o3: make dispatch LSQ full check more selective
Dispatch should not check LSQ size/LSQ stall for non load/store
instructions.
This work was done while Binh was an intern at AMD Research.
Diffstat (limited to 'util/statetrace')
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