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authorAndrew Bardsley <Andrew.Bardsley@arm.com>2014-10-16 05:49:56 -0400
committerAndrew Bardsley <Andrew.Bardsley@arm.com>2014-10-16 05:49:56 -0400
commitd6732895a5c2e81da47ada339b5d9269c02e5e8b (patch)
treec8f1f235e96e76946dde6b914a903b5dd74d170c /util/streamline
parent83f7e7afaf962a6f7967c3ace00a85c58508e2e9 (diff)
downloadgem5-d6732895a5c2e81da47ada339b5d9269c02e5e8b.tar.xz
mem: Add ExternalMaster and ExternalSlave ports
This patch adds two MemoryObject's: ExternalMaster and ExternalSlave. Each object has a single port which can be bound to an externally- provided bridge to a port of another simulation system at initialisation.
Diffstat (limited to 'util/streamline')
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