diff options
author | Tuan Ta <qtt2@cornell.edu> | 2018-04-02 16:21:28 -0400 |
---|---|---|
committer | Tuan Ta <qtt2@cornell.edu> | 2019-02-08 15:25:30 +0000 |
commit | 72d1d2930fc2b8ef6d32ec2ce2eabbac00684159 (patch) | |
tree | 30e4dff525d704bf39e446e1a9ee80ebb7418635 /util/style | |
parent | cf45f22369f85397f113918a4f773b2613f0e19b (diff) | |
download | gem5-72d1d2930fc2b8ef6d32ec2ce2eabbac00684159.tar.xz |
arch-riscv: initialize RISC-V's thread pointer register in clone syscall
This patch initializes thread pointer register to Thread Local Storage
(TLS)'s pointer given to a clone system call.
Change-Id: I03e2cf4763e6a0ed31f357772a513a05e1e3461b
Reviewed-on: https://gem5-review.googlesource.com/c/9622
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
Diffstat (limited to 'util/style')
0 files changed, 0 insertions, 0 deletions