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author | Christian Menard <Christian.Menard@tu-dresden.de> | 2017-02-09 19:15:41 -0500 |
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committer | Christian Menard <Christian.Menard@tu-dresden.de> | 2017-02-09 19:15:41 -0500 |
commit | 03f740664bc8db8890359c9c5ad02df9db478bae (patch) | |
tree | 27de717f997634ca22d04200a51b54305244929b /util/tlm/sim_control.cc | |
parent | ccd9210e1a1bdce828a13a4ffdf84548ffe61592 (diff) | |
download | gem5-03f740664bc8db8890359c9c5ad02df9db478bae.tar.xz |
misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10]
Changeset 11798:3a490c57058d
---------------------------
misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10]
The current TLM bridge only provides a Slave Port that allows the gem5
world to send request to the SystemC world. This patch series refractors
and cleans up the existing code, and adds a Master Port that allows the
SystemC world to send requests to the gem5 world.
This patch:
* Introduce transactor modules that represent the gem5 ports in the
* SystemC world.
* Update the SimControl module and let it keep track of the gem5 ports.
Reviewed at http://reviews.gem5.org/r/3775/
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'util/tlm/sim_control.cc')
-rw-r--r-- | util/tlm/sim_control.cc | 53 |
1 files changed, 50 insertions, 3 deletions
diff --git a/util/tlm/sim_control.cc b/util/tlm/sim_control.cc index d6bedc80b..f6a3e4ffe 100644 --- a/util/tlm/sim_control.cc +++ b/util/tlm/sim_control.cc @@ -77,8 +77,11 @@ Gem5SimControl::Gem5SimControl(sc_core::sc_module_name name, instance = this; cxxConfigInit(); - Gem5SystemC::SCSlavePort::registerPortHandler(); - Gem5SystemC::SCMasterPort::registerPortHandler(*this); + + // register the systemc slave and master port handler + ExternalSlave::registerHandler("tlm_slave", new SCSlavePortHandler(*this)); + ExternalMaster::registerHandler("tlm_master", + new SCMasterPortHandler(*this)); Trace::setDebugLogger(&logger); @@ -134,7 +137,7 @@ Gem5SimControl::Gem5SimControl(sc_core::sc_module_name name, } void -Gem5SimControl::before_end_of_elaboration() +Gem5SimControl::end_of_elaboration() { try { config_manager->initState(); @@ -167,4 +170,48 @@ Gem5SimControl::run() #endif } +void +Gem5SimControl::registerSlavePort(const std::string& name, SCSlavePort* port) +{ + if (slavePorts.find(name) == slavePorts.end()) { + slavePorts[name] = port; + } else { + std::cerr << "Slave Port " << name << " is already registered!\n"; + std::exit(EXIT_FAILURE); + } +} + +void +Gem5SimControl::registerMasterPort(const std::string& name, SCMasterPort* port) +{ + if (masterPorts.find(name) == masterPorts.end()) { + masterPorts[name] = port; + } else { + std::cerr << "Master Port " << name << " is already registered!\n"; + std::exit(EXIT_FAILURE); + } +} + +SCSlavePort* +Gem5SimControl::getSlavePort(const std::string& name) +{ + if (slavePorts.find(name) == slavePorts.end()) { + std::cerr << "Slave Port " << name << " was not found!\n"; + std::exit(EXIT_FAILURE); + } + + return slavePorts.at(name); +} + +SCMasterPort* +Gem5SimControl::getMasterPort(const std::string& name) +{ + if (masterPorts.find(name) == masterPorts.end()) { + std::cerr << "Master Port " << name << " was not found!\n"; + std::exit(EXIT_FAILURE); + } + + return masterPorts.at(name); +} + } |