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authorRadhika Jagtap <radhika.jagtap@ARM.com>2015-12-07 16:42:16 -0600
committerRadhika Jagtap <radhika.jagtap@ARM.com>2015-12-07 16:42:16 -0600
commit54519fd51f739c3a37c4ad712b86a353eabbbfec (patch)
tree21002ebffe820d302b839ac625636830b141964b /util
parent3080bbcc365e6ed663787a4c06cd2b7c4a118d47 (diff)
downloadgem5-54519fd51f739c3a37c4ad712b86a353eabbbfec.tar.xz
cpu: Support virtual addr in elastic traces
This patch adds support to optionally capture the virtual address and asid for load/store instructions in the elastic traces. If they are present in the traces, Trace CPU will set those fields of the request during replay.
Diffstat (limited to 'util')
-rwxr-xr-xutil/decode_inst_dep_trace.py11
-rwxr-xr-xutil/encode_inst_dep_trace.py12
2 files changed, 12 insertions, 11 deletions
diff --git a/util/decode_inst_dep_trace.py b/util/decode_inst_dep_trace.py
index 2e7e6381c..6e4030146 100755
--- a/util/decode_inst_dep_trace.py
+++ b/util/decode_inst_dep_trace.py
@@ -72,12 +72,12 @@
#
# The ASCII trace format uses one line per instruction with the format
# instruction sequence number, (optional) pc, (optional) weight, type
-# (optional) flags, (optional) addr, (optional) size, comp delay,
+# (optional) flags, (optional) phys addr, (optional) size, comp delay,
# (repeated) order dependencies comma-separated, and (repeated) register
# dependencies comma-separated.
#
# examples:
-# seq_num,[pc],[weight,]type,[address,size,flags,]comp_delay:[rob_dep]:
+# seq_num,[pc],[weight,]type,[p_addr,size,flags,]comp_delay:[rob_dep]:
# [reg_dep]
# 1,35652,1,COMP,8500::
# 2,35656,1,COMP,0:,1:
@@ -178,9 +178,10 @@ def main():
exit(-1)
- # Write to file if it has the optional fields addr, size, flags
- if packet.HasField('addr'):
- ascii_out.write(',%s' % (packet.addr))
+ # Write to file if it has the optional fields physical addr, size,
+ # flags
+ if packet.HasField('p_addr'):
+ ascii_out.write(',%s' % (packet.p_addr))
if packet.HasField('size'):
ascii_out.write(',%s' % (packet.size))
if packet.HasField('flags'):
diff --git a/util/encode_inst_dep_trace.py b/util/encode_inst_dep_trace.py
index 6293fb0ab..e54e82d70 100755
--- a/util/encode_inst_dep_trace.py
+++ b/util/encode_inst_dep_trace.py
@@ -72,12 +72,12 @@
#
# The ASCII trace format uses one line per instruction with the format
# instruction sequence number, (optional) pc, (optional) weight, type,
-# (optional) flags, (optional) addr, (optional) size, comp delay,
+# (optional) flags, (optional) physical addr, (optional) size, comp delay,
# (repeated) order dependencies comma-separated, and (repeated) register
# dependencies comma-separated.
#
# examples:
-# seq_num,[pc],[weight,]type,[address,size,flags,]comp_delay:[rob_dep]:
+# seq_num,[pc],[weight,]type,[p_addr,size,flags,]comp_delay:[rob_dep]:
# [reg_dep]
# 1,35652,1,COMP,8500::
# 2,35656,1,COMP,0:,1:
@@ -167,11 +167,11 @@ def main():
print "Seq. num", dep_record.seq_num, "is of INVALID type"
exit(-1)
- # If the instruction is a load or store record the addr, size flags
- # in addition to recording the computation delay
+ # If the instruction is a load or store record the physical addr,
+ # size flags in addition to recording the computation delay
if dep_record.type in [DepRecord.LOAD, DepRecord.STORE]:
- addr, size, flags, comp_delay = inst_info_list[4:8]
- dep_record.addr = long(addr)
+ p_addr, size, flags, comp_delay = inst_info_list[4:8]
+ dep_record.p_addr = long(p_addr)
dep_record.size = int(size)
dep_record.flags = int(flags)
dep_record.comp_delay = long(comp_delay)