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authorLisa Hsu <Lisa.Hsu@amd.com>2010-01-19 22:03:44 -0800
committerLisa Hsu <Lisa.Hsu@amd.com>2010-01-19 22:03:44 -0800
commitd6da17251774a34b2835b71332cfaa682d979c3f (patch)
treeb71fb3f0d8c4acd2e9e4ac762e2421a7b841e6b2 /util
parent0484432a7ca177d52fa98746b16c92805df73189 (diff)
downloadgem5-d6da17251774a34b2835b71332cfaa682d979c3f.tar.xz
util: do checkpoint aggregation more cleanly, fix last changeset.
1) Move alpha-specific code out of page_table.cc:serialize(). 2) Begin serializing M5_pid and unserializing it, but adding an function to do optional paramIn so that old checkpoints don't need to be fixed up. 3) Fix up alpha startup code so that the unserialized M5_pid value is properly written to DTB_IPR_ASN. 4) Fix the memory unserialize that I forgot somehow in the last changeset. 5) Add in an agg_se.py to handle aggregated checkpoints. --bench foo-bar plus positional arguments foo bar are the only changes in usage from se.py. Note this aggregation stuff has only been tested for Alpha and nothing else, though it should take a very minimal amount of work to get it to work with another ISA.
Diffstat (limited to 'util')
-rwxr-xr-xutil/checkpoint-aggregator.py2
1 files changed, 2 insertions, 0 deletions
diff --git a/util/checkpoint-aggregator.py b/util/checkpoint-aggregator.py
index f3c5eb5be..c7581201d 100755
--- a/util/checkpoint-aggregator.py
+++ b/util/checkpoint-aggregator.py
@@ -50,6 +50,8 @@ def aggregate(options, args):
if re.compile("cpu").search(sec):
newsec = re.sub("cpu", "cpu" + str(i), sec)
merged.add_section(newsec)
+ if re.compile("workload$").search(sec):
+ merged.set(newsec, "M5_pid", i)
items = config.items(sec)
for item in items: