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author | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
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committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
commit | a5c4eb3de9deb3a71a6a5230a25ff5962e584980 (patch) | |
tree | 874b659c6a5eaa1316cde9eb82ec7d08badf638a /util | |
parent | e255fa053f8d105de8d188077a318124a3aad9ce (diff) | |
download | gem5-a5c4eb3de9deb3a71a6a5230a25ff5962e584980.tar.xz |
isa,cpu: Add support for FS SMT Interrupts
Adds per-thread interrupt controllers and thread/context logic
so that interrupts properly get routed in SMT systems.
Diffstat (limited to 'util')
-rw-r--r-- | util/cpt_upgraders/smt-interrupts.py | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/util/cpt_upgraders/smt-interrupts.py b/util/cpt_upgraders/smt-interrupts.py new file mode 100644 index 000000000..2c7109c04 --- /dev/null +++ b/util/cpt_upgraders/smt-interrupts.py @@ -0,0 +1,19 @@ +# Upgrade single-threaded checkpoints to be properly supported with SMT. +# SMT adds per-thread interrupts. Thus we must move the interrupt status +# from the CPU and into the execution context. +def upgrader(cpt): + for sec in cpt.sections(): + import re + + re_cpu_match = re.match('^(.*sys.*\.cpu[^._]*)$', sec) + if re_cpu_match != None: + interrupts = cpt.get(sec, 'interrupts') + intStatus = cpt.get(sec, 'intStatus') + + cpu_name = re_cpu_match.group(1) + + cpt.set(cpu_name + ".xc.0", 'interrupts', interrupts) + cpt.set(cpu_name + ".xc.0", 'intStatus', intStatus) + + cpt.remove_option(sec, 'interrupts') + cpt.remove_option(sec, 'intStatus') |