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-rw-r--r--SConstruct3
-rw-r--r--src/arch/alpha/linux/system.cc7
-rw-r--r--src/base/fast_alloc.cc8
-rw-r--r--src/dev/alpha/tsunami_cchip.cc2
-rw-r--r--src/dev/io_device.cc16
-rw-r--r--src/mem/bridge.cc7
-rw-r--r--src/mem/bus.cc6
-rw-r--r--src/mem/cache/base_cache.cc4
-rw-r--r--src/mem/cache/cache_impl.hh36
9 files changed, 44 insertions, 45 deletions
diff --git a/SConstruct b/SConstruct
index 1c2dcab1c..ec60964e4 100644
--- a/SConstruct
+++ b/SConstruct
@@ -287,7 +287,8 @@ if not env.has_key('SWIG'):
# Check for appropriate SWIG version
swig_version = os.popen('swig -version').read().split()
# First 3 words should be "SWIG Version x.y.z"
-if swig_version[0] != 'SWIG' or swig_version[1] != 'Version':
+if len(swig_version) < 3 or \
+ swig_version[0] != 'SWIG' or swig_version[1] != 'Version':
print 'Error determining SWIG version.'
Exit(1)
diff --git a/src/arch/alpha/linux/system.cc b/src/arch/alpha/linux/system.cc
index 9a452e10f..e8bdc1d66 100644
--- a/src/arch/alpha/linux/system.cc
+++ b/src/arch/alpha/linux/system.cc
@@ -132,7 +132,12 @@ LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
idleStartEvent = addKernelFuncEvent<IdleStartEvent>("cpu_idle");
- if (kernelSymtab->findAddress("alpha_switch_to", addr) && DTRACE(Thread)) {
+ // Disable for now as it runs into panic() calls in VPTr methods
+ // (see sim/vptr.hh). Once those bugs are fixed, we can
+ // re-enable, but we should find a better way to turn it on than
+ // using DTRACE(Thread), since looking at a trace flag at tick 0
+ // leads to non-intuitive behavior with --trace-start.
+ if (false && kernelSymtab->findAddress("alpha_switch_to", addr)) {
printThreadEvent = new PrintThreadInfo(&pcEventQueue, "threadinfo",
addr + sizeof(MachInst) * 6);
} else {
diff --git a/src/base/fast_alloc.cc b/src/base/fast_alloc.cc
index 610dff66c..e1298a8bd 100644
--- a/src/base/fast_alloc.cc
+++ b/src/base/fast_alloc.cc
@@ -34,15 +34,15 @@
* by permission.
*/
-#ifndef NO_FAST_ALLOC
+#include <assert.h>
+#include "base/fast_alloc.hh"
+
+#if !NO_FAST_ALLOC
#ifdef __GNUC__
#pragma implementation
#endif
-#include <assert.h>
-#include "base/fast_alloc.hh"
-
void *FastAlloc::freeLists[Num_Buckets];
#ifdef FAST_ALLOC_STATS
diff --git a/src/dev/alpha/tsunami_cchip.cc b/src/dev/alpha/tsunami_cchip.cc
index 118160adf..8ed7e3399 100644
--- a/src/dev/alpha/tsunami_cchip.cc
+++ b/src/dev/alpha/tsunami_cchip.cc
@@ -453,7 +453,7 @@ TsunamiCChip::postRTC()
if (!(cpumask & itint)) {
itint |= cpumask;
tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ2, 0);
- DPRINTF(Tsunami, "Posting RTC interrupt to cpu=%d", i);
+ DPRINTF(Tsunami, "Posting RTC interrupt to cpu=%d\n", i);
}
}
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index ecbb391ef..be5756ab7 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -103,8 +103,8 @@ DmaPort::recvTiming(PacketPtr pkt)
if (pkt->result == Packet::Nacked) {
- DPRINTF(DMA, "Received nacked Pkt %#x with State: %#x Addr: %#x\n",
- pkt, pkt->senderState, pkt->getAddr());
+ DPRINTF(DMA, "Received nacked %s addr %#x\n",
+ pkt->cmdString(), pkt->getAddr());
if (backoffTime < device->minBackoffDelay)
backoffTime = device->minBackoffDelay;
@@ -121,8 +121,8 @@ DmaPort::recvTiming(PacketPtr pkt)
DmaReqState *state;
backoffTime >>= 2;
- DPRINTF(DMA, "Received response Pkt %#x with State: %#x Addr: %#x size: %#x\n",
- pkt, pkt->senderState, pkt->getAddr(), pkt->req->getSize());
+ DPRINTF(DMA, "Received response %s addr %#x size %#x\n",
+ pkt->cmdString(), pkt->getAddr(), pkt->req->getSize());
state = dynamic_cast<DmaReqState*>(pkt->senderState);
pendingCount--;
@@ -184,8 +184,8 @@ DmaPort::recvRetry()
PacketPtr pkt = transmitList.front();
bool result = true;
do {
- DPRINTF(DMA, "Retry on Packet %#x with senderState: %#x\n",
- pkt, pkt->senderState);
+ DPRINTF(DMA, "Retry on %s addr %#x\n",
+ pkt->cmdString(), pkt->getAddr());
result = sendTiming(pkt);
if (result) {
DPRINTF(DMA, "-- Done\n");
@@ -269,8 +269,8 @@ DmaPort::sendDma()
return;
}
- DPRINTF(DMA, "Attempting to send Packet %#x with addr: %#x\n",
- pkt, pkt->getAddr());
+ DPRINTF(DMA, "Attempting to send %s addr %#x\n",
+ pkt->cmdString(), pkt->getAddr());
bool result;
do {
diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc
index 04b0308e1..8bc32711d 100644
--- a/src/mem/bridge.cc
+++ b/src/mem/bridge.cc
@@ -213,10 +213,7 @@ Bridge::BridgePort::queueForSendTiming(PacketPtr pkt)
if (buf->expectResponse && pkt->result == Packet::Nacked)
--outstandingResponses;
-
- DPRINTF(BusBridge, "restoring sender state: %#X, from packet buffer: %#X\n",
- pkt->senderState, buf);
- DPRINTF(BusBridge, " is response, new dest %d\n", pkt->getDest());
+ DPRINTF(BusBridge, "response, new dest %d\n", pkt->getDest());
delete buf;
}
@@ -229,8 +226,6 @@ Bridge::BridgePort::queueForSendTiming(PacketPtr pkt)
Tick readyTime = curTick + delay;
PacketBuffer *buf = new PacketBuffer(pkt, readyTime);
- DPRINTF(BusBridge, "old sender state: %#X, new sender state: %#X\n",
- buf->origSenderState, buf);
// If we're about to put this packet at the head of the queue, we
// need to schedule an event to do the transmit. Otherwise there
diff --git a/src/mem/bus.cc b/src/mem/bus.cc
index d818a25ea..443c0557c 100644
--- a/src/mem/bus.cc
+++ b/src/mem/bus.cc
@@ -173,9 +173,8 @@ bool
Bus::recvTiming(PacketPtr pkt)
{
Port *port;
- DPRINTF(Bus, "recvTiming: packet src %d dest %d addr 0x%x cmd %s result %d\n",
- pkt->getSrc(), pkt->getDest(), pkt->getAddr(), pkt->cmdString(),
- pkt->result);
+ DPRINTF(Bus, "recvTiming: packet src %d dest %d addr 0x%x cmd %s\n",
+ pkt->getSrc(), pkt->getDest(), pkt->getAddr(), pkt->cmdString());
BusPort *pktPort;
if (pkt->getSrc() == defaultId)
@@ -261,7 +260,6 @@ Bus::recvTiming(PacketPtr pkt)
void
Bus::recvRetry(int id)
{
- DPRINTF(Bus, "Received a retry from %s\n", id == -1 ? "self" : interfaces[id]->getPeer()->name());
// If there's anything waiting, and the bus isn't busy...
if (retryList.size() && curTick >= tickNextIdle) {
//retryingPort = retryList.front();
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc
index 8aac02460..84373aa9b 100644
--- a/src/mem/cache/base_cache.cc
+++ b/src/mem/cache/base_cache.cc
@@ -162,7 +162,7 @@ BaseCache::CachePort::recvRetry()
mshr->pkt = copyPkt;
bool success = sendTiming(pkt);
- DPRINTF(Cache, "Address %x was %s in sending the timing request\n",
+ DPRINTF(CachePort, "Address %x was %s in sending the timing request\n",
pkt->getAddr(), success ? "succesful" : "unsuccesful");
waitingOnRetry = !success;
@@ -272,7 +272,7 @@ BaseCache::RequestEvent::process()
mshr->pkt = copyPkt;
bool success = cachePort->sendTiming(pkt);
- DPRINTF(Cache, "Address %x was %s in sending the timing request\n",
+ DPRINTF(CachePort, "Address %x was %s in sending the timing request\n",
pkt->getAddr(), success ? "succesful" : "unsuccesful");
cachePort->waitingOnRetry = !success;
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 9b094c1e3..4cd5ab004 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -631,8 +631,10 @@ Cache<TagStore,Coherence>::access(PacketPtr &pkt)
delete wbPkt;
}
- DPRINTF(Cache, "%s %x %s\n", pkt->cmdString(), pkt->getAddr(),
- (blk) ? "hit" : "miss");
+ if (!pkt->req->isUncacheable()) {
+ DPRINTF(Cache, "%s %x %s\n", pkt->cmdString(), pkt->getAddr(),
+ (blk) ? "hit" : "miss");
+ }
if (blk) {
// Hit
@@ -713,14 +715,14 @@ Cache<TagStore,Coherence>::sendResult(PacketPtr &pkt, MSHR* mshr,
BlkType *blk = tags->findBlock(pkt->getAddr());
CacheBlk::State old_state = (blk) ? blk->status : 0;
CacheBlk::State new_state = coherence->getNewState(pkt,old_state);
- if (old_state != new_state)
- DPRINTF(Cache, "Block for blk addr %x moving from state "
- "%i to %i\n", pkt->getAddr(), old_state, new_state);
//Set the state on the upgrade
std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
PacketList writebacks;
handleFill(blk, mshr, new_state, writebacks, pkt);
assert(writebacks.empty());
+ if (old_state != new_state)
+ DPRINTF(Cache, "Block addr %x moving from state "
+ "%i to %i\n", pkt->getAddr(), old_state, new_state);
missQueue->handleResponse(pkt, curTick + hitLatency);
}
} else if (pkt && !pkt->req->isUncacheable()) {
@@ -756,7 +758,7 @@ Cache<TagStore,Coherence>::handleResponse(PacketPtr &pkt)
//Make the response a Bad address and send it
}
// MemDebug::cacheResponse(pkt);
- DPRINTF(Cache, "Handling reponse to %x\n", pkt->getAddr());
+ DPRINTF(Cache, "Handling response to %x\n", pkt->getAddr());
if (pkt->isCacheFill() && !pkt->isNoAllocate()) {
DPRINTF(Cache, "Block for addr %x being updated in Cache\n",
@@ -765,13 +767,11 @@ Cache<TagStore,Coherence>::handleResponse(PacketPtr &pkt)
CacheBlk::State old_state = (blk) ? blk->status : 0;
PacketList writebacks;
CacheBlk::State new_state = coherence->getNewState(pkt,old_state);
- if (old_state != new_state)
- DPRINTF(Cache, "Block for blk addr %x moving from "
- "state %i to %i\n",
- pkt->getAddr(),
- old_state, new_state);
blk = handleFill(blk, (MSHR*)pkt->senderState,
new_state, writebacks, pkt);
+ if (old_state != new_state)
+ DPRINTF(Cache, "Block addr %x moving from state %i to %i\n",
+ pkt->getAddr(), old_state, new_state);
while (!writebacks.empty()) {
PacketPtr wbPkt = writebacks.front();
missQueue->doWriteback(wbPkt);
@@ -919,7 +919,7 @@ Cache<TagStore,Coherence>::snoop(PacketPtr &pkt)
}
if (satisfy) {
- DPRINTF(Cache, "Cache snooped a %s request for addr %x and "
+ DPRINTF(Cache, "snooped a %s request for addr %x and "
"now supplying data, new state is %i\n",
pkt->cmdString(), blk_addr, new_state);
@@ -928,7 +928,7 @@ Cache<TagStore,Coherence>::snoop(PacketPtr &pkt)
return;
}
if (blk)
- DPRINTF(Cache, "Cache snooped a %s request for addr %x, "
+ DPRINTF(Cache, "snooped a %s request for addr %x, "
"new state is %i\n", pkt->cmdString(), blk_addr, new_state);
handleSnoop(blk, new_state);
@@ -1070,11 +1070,11 @@ return 0;
coherence->getNewState(busPkt, old_state);
DPRINTF(Cache, "Receive response: %s for addr %x in state %i\n",
busPkt->cmdString(), busPkt->getAddr(), old_state);
- if (old_state != new_state)
- DPRINTF(Cache, "Block for blk addr %x moving from state "
- "%i to %i\n", busPkt->getAddr(), old_state, new_state);
handleFill(blk, busPkt, new_state, writebacks, pkt);
+ if (old_state != new_state)
+ DPRINTF(Cache, "Block addr %x moving from state "
+ "%i to %i\n", busPkt->getAddr(), old_state, new_state);
//Free the packet
delete busPkt;
@@ -1127,8 +1127,8 @@ Cache<TagStore,Coherence>::snoopProbe(PacketPtr &pkt)
CacheBlk::State new_state = 0;
bool satisfy = coherence->handleBusRequest(pkt,blk,mshr, new_state);
if (satisfy) {
- DPRINTF(Cache, "Cache snooped a %s request for addr %x and "
- "now supplying data, new state is %i\n",
+ DPRINTF(Cache, "Cache snooped a %s request for addr %x, "
+ "supplying data, new state is %i\n",
pkt->cmdString(), blk_addr, new_state);
handleSnoop(blk, new_state, pkt);
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-16 06:28:49 +0000