diff options
| -rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index 7ac85654e..a8ec0333f 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -1056,18 +1056,15 @@ LSQUnit<Impl>::updateVisibleState() } else { /* set taint for dst registers */ inst->taintDestRegs(true); - inst->isTainted = true; /* if the load depends on tainted registers, set readyToExpose to false, otherwise set it to true */ - if (inst->srcTainted()) { + bool doSpecLoad = inst->needPostFetch() || inst->srcTainted(); + if (doSpecLoad) { DPRINTF(LSQUnit, "load inst [sn:%lli] %s not safe, set readyToExpose to false\n", inst->seqNum, inst->pcState()); inst->readyToExpose(false); } else { DPRINTF(LSQUnit, "load inst [sn:%lli] %s is an unsafe speculated load, but source registers are not tainted.\n", inst->seqNum, inst->pcState()); - if (!inst->readyToExpose() && inst->needPostFetch()) { - ++loadsToVLD; - } inst->readyToExpose(true); } } |