diff options
| -rw-r--r-- | src/cpu/simple/timing.cc | 11 | ||||
| -rw-r--r-- | src/cpu/simple/timing.hh | 4 |
2 files changed, 13 insertions, 2 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 2abe9cd59..7307f2fc9 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -999,7 +999,16 @@ TimingSimpleCPU::DcachePort::recvTiming(PacketPtr pkt) if (next_tick == curTick) { cpu->completeDataAccess(pkt); } else { - tickEvent.schedule(pkt, next_tick); + if (!tickEvent.scheduled()) { + tickEvent.schedule(pkt, next_tick); + } else { + // In the case of a split transaction and a cache that is + // faster than a CPU we could get two responses before + // next_tick expires + if (!retryEvent.scheduled()) + schedule(retryEvent, next_tick); + return false; + } } return true; diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 65cbe3098..2b0c8942a 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -140,7 +140,7 @@ class TimingSimpleCPU : public BaseSimpleCPU public: CpuPort(const std::string &_name, TimingSimpleCPU *_cpu, Tick _lat) - : Port(_name, _cpu), cpu(_cpu), lat(_lat) + : Port(_name, _cpu), cpu(_cpu), lat(_lat), retryEvent(this) { } bool snoopRangeSent; @@ -161,12 +161,14 @@ class TimingSimpleCPU : public BaseSimpleCPU { PacketPtr pkt; TimingSimpleCPU *cpu; + CpuPort *port; TickEvent(TimingSimpleCPU *_cpu) : cpu(_cpu) {} const char *description() const { return "Timing CPU tick"; } void schedule(PacketPtr _pkt, Tick t); }; + EventWrapper<Port, &Port::sendRetry> retryEvent; }; class IcachePort : public CpuPort |