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-rw-r--r--base/inifile.cc4
-rw-r--r--base/intmath.hh14
-rw-r--r--base/loader/elf_object.cc5
-rw-r--r--base/stats/text.cc4
-rw-r--r--cpu/exec_context.hh9
-rw-r--r--cpu/simple_cpu/simple_cpu.cc1
-rw-r--r--dev/alpha_console.cc113
-rw-r--r--dev/alpha_console.hh3
-rw-r--r--dev/disk_image.cc40
-rw-r--r--dev/ethertap.cc2
-rw-r--r--dev/pcidev.cc96
-rw-r--r--dev/tsunami_uart.cc2
-rw-r--r--kern/linux/linux_system.cc6
13 files changed, 200 insertions, 99 deletions
diff --git a/base/inifile.cc b/base/inifile.cc
index c12b25030..7f6a42dd6 100644
--- a/base/inifile.cc
+++ b/base/inifile.cc
@@ -35,7 +35,7 @@
#include <sys/types.h>
#include <sys/wait.h>
-#if defined(__OpenBSD__)
+#if defined(__OpenBSD__) || defined(__APPLE__)
#include <libgen.h>
#endif
#include <stdio.h>
@@ -146,7 +146,7 @@ IniFile::loadCPP(const string &file, vector<char *> &cppArgs)
execvp("g++", args);
- exit(1);
+ exit(0);
}
int retval;
diff --git a/base/intmath.hh b/base/intmath.hh
index cb5a34107..fc28eecef 100644
--- a/base/intmath.hh
+++ b/base/intmath.hh
@@ -119,6 +119,20 @@ FloorLog2(int64_t x)
return FloorLog2((uint64_t)x);
}
+inline int
+FloorLog2(size_t x)
+{
+ assert(x > 0);
+ assert(sizeof(size_t) == 4 || sizeof(size_t) == 8);
+
+ // It's my hope that this is optimized away?
+ if (sizeof(size_t) == 4)
+ return FloorLog2((uint32_t)x);
+ else if (sizeof(size_t) == 8)
+ return FloorLog2((uint64_t)x);
+
+}
+
template <class T>
inline int
CeilLog2(T n)
diff --git a/base/loader/elf_object.cc b/base/loader/elf_object.cc
index 036363995..b8f46449a 100644
--- a/base/loader/elf_object.cc
+++ b/base/loader/elf_object.cc
@@ -74,8 +74,9 @@ ElfObject::tryFile(const string &fname, int fd, size_t len, uint8_t *data)
else {
if (ehdr.e_ident[EI_CLASS] == ELFCLASS32)
panic("32 bit ELF Binary, Not Supported");
- if (ehdr.e_machine != EM_ALPHA)
- panic("Non Alpha Binary, Not Supported");
+ printf("emachine = %x\n", ehdr.e_machine);
+// if (ehdr.e_machine != EM_ALPHA)
+// panic("Non Alpha Binary, Not Supported");
elf_end(elf);
diff --git a/base/stats/text.cc b/base/stats/text.cc
index 6e80c26d6..f7e82a30f 100644
--- a/base/stats/text.cc
+++ b/base/stats/text.cc
@@ -26,6 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#if defined(__APPLE__)
+#define _GLIBCPP_USE_C99 1
+#endif
+
#include <iostream>
#include <fstream>
#include <string>
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index 08879b3b5..b47f5cd08 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -33,6 +33,7 @@
#include "mem/mem_req.hh"
#include "mem/functional_mem/functional_memory.hh"
#include "sim/serialize.hh"
+#include "targetarch/byte_swap.hh"
// forward declaration: see functional_memory.hh
class FunctionalMemory;
@@ -260,7 +261,11 @@ class ExecContext
cregs->lock_flag = true;
}
#endif
- return mem->read(req, data);
+
+ Fault error;
+ error = mem->read(req, data);
+ data = htoa(data);
+ return error;
}
template <class T>
@@ -309,7 +314,7 @@ class ExecContext
}
#endif
- return mem->write(req, data);
+ return mem->write(req, (T)htoa(data));
}
virtual bool misspeculating();
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index 99e302ca3..bf4cbfbe2 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -710,6 +710,7 @@ SimpleCPU::tick()
comInstEventQueue[0]->serviceEvents(numInst);
// decode the instruction
+ inst = htoa(inst);
StaticInstPtr<TheISA> si(inst);
traceData = Trace::getInstRecord(curTick, xc, this, si,
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index ee20511e1..5c4858ee5 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -51,6 +51,7 @@
#include "sim/system.hh"
#include "dev/tsunami_io.hh"
#include "sim/sim_object.hh"
+#include "targetarch/byte_swap.hh"
using namespace std;
@@ -68,9 +69,6 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
pioInterface->addAddrRange(addr, addr + size);
}
- consoleData = new uint8_t[size];
- memset(consoleData, 0, size);
-
alphaAccess->last_offset = size - 1;
alphaAccess->kernStart = system->getKernelStart();
alphaAccess->kernEnd = system->getKernelEnd();
@@ -82,42 +80,101 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
alphaAccess->cpuClock = cpu->getFreq() / 1000000;
alphaAccess->intrClockFrequency = platform->intrFrequency();
alphaAccess->diskUnit = 1;
+
+ alphaAccess->diskCount = 0;
+ alphaAccess->diskPAddr = 0;
+ alphaAccess->diskBlock = 0;
+ alphaAccess->diskOperation = 0;
+ alphaAccess->outputChar = 0;
+ alphaAccess->inputChar = 0;
+ alphaAccess->bootStrapImpure = 0;
+ alphaAccess->bootStrapCPU = 0;
+ alphaAccess->align2 = 0;
}
Fault
AlphaConsole::read(MemReqPtr &req, uint8_t *data)
{
memset(data, 0, req->size);
- uint64_t val;
Addr daddr = req->paddr - (addr & PA_IMPL_MASK);
- switch (daddr) {
- case offsetof(AlphaAccess, inputChar):
- val = console->console_in();
- break;
-
- default:
- val = *(uint64_t *)(consoleData + daddr);
- break;
+ switch (req->size)
+ {
+ case sizeof(uint32_t):
+ DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, *(uint32_t*)data);
+ switch (daddr)
+ {
+ case offsetof(AlphaAccess, last_offset):
+ *(uint32_t*)data = alphaAccess->last_offset;
+ break;
+ case offsetof(AlphaAccess, version):
+ *(uint32_t*)data = alphaAccess->version;
+ break;
+ case offsetof(AlphaAccess, numCPUs):
+ *(uint32_t*)data = alphaAccess->numCPUs;
+ break;
+ case offsetof(AlphaAccess, bootStrapCPU):
+ *(uint32_t*)data = alphaAccess->bootStrapCPU;
+ break;
+ case offsetof(AlphaAccess, intrClockFrequency):
+ *(uint32_t*)data = alphaAccess->intrClockFrequency;
+ break;
+ default:
+ panic("Unknown 32bit access, %#x\n", daddr);
+ }
+ break;
+ case sizeof(uint64_t):
+ DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, *(uint64_t*)data);
+ switch (daddr)
+ {
+ case offsetof(AlphaAccess, inputChar):
+ *(uint64_t*)data = console->console_in();
+ break;
+ case offsetof(AlphaAccess, cpuClock):
+ *(uint64_t*)data = alphaAccess->cpuClock;
+ break;
+ case offsetof(AlphaAccess, mem_size):
+ *(uint64_t*)data = alphaAccess->mem_size;
+ break;
+ case offsetof(AlphaAccess, kernStart):
+ *(uint64_t*)data = alphaAccess->kernStart;
+ break;
+ case offsetof(AlphaAccess, kernEnd):
+ *(uint64_t*)data = alphaAccess->kernEnd;
+ break;
+ case offsetof(AlphaAccess, entryPoint):
+ *(uint64_t*)data = alphaAccess->entryPoint;
+ break;
+ case offsetof(AlphaAccess, diskUnit):
+ *(uint64_t*)data = alphaAccess->diskUnit;
+ break;
+ case offsetof(AlphaAccess, diskCount):
+ *(uint64_t*)data = alphaAccess->diskCount;
+ break;
+ case offsetof(AlphaAccess, diskPAddr):
+ *(uint64_t*)data = alphaAccess->diskPAddr;
+ break;
+ case offsetof(AlphaAccess, diskBlock):
+ *(uint64_t*)data = alphaAccess->diskBlock;
+ break;
+ case offsetof(AlphaAccess, diskOperation):
+ *(uint64_t*)data = alphaAccess->diskOperation;
+ break;
+ case offsetof(AlphaAccess, outputChar):
+ *(uint64_t*)data = alphaAccess->outputChar;
+ break;
+ case offsetof(AlphaAccess, bootStrapImpure):
+ *(uint64_t*)data = alphaAccess->bootStrapImpure;
+ break;
+ default:
+ panic("Unknown 64bit access, %#x\n", daddr);
+ }
+ break;
+ default:
+ return Machine_Check_Fault;
}
- DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, val);
-
- switch (req->size) {
- case sizeof(uint32_t):
- *(uint32_t *)data = (uint32_t)val;
- break;
-
- case sizeof(uint64_t):
- *(uint64_t *)data = val;
- break;
-
- default:
- return Machine_Check_Fault;
- }
-
-
return No_Fault;
}
diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh
index 39d0a0a6b..47afa8f4a 100644
--- a/dev/alpha_console.hh
+++ b/dev/alpha_console.hh
@@ -73,10 +73,7 @@ class SimpleDisk;
class AlphaConsole : public PioDevice
{
protected:
- union {
AlphaAccess *alphaAccess;
- uint8_t *consoleData;
- };
/** the disk must be accessed from the console */
SimpleDisk *disk;
diff --git a/dev/disk_image.cc b/dev/disk_image.cc
index 7779cd79f..d990d7078 100644
--- a/dev/disk_image.cc
+++ b/dev/disk_image.cc
@@ -46,6 +46,7 @@
#include "dev/disk_image.hh"
#include "sim/builder.hh"
#include "sim/sim_exit.hh"
+#include "targetarch/byte_swap.hh"
using namespace std;
@@ -227,7 +228,17 @@ SafeRead(ifstream &stream, void *data, int count)
template<class T>
void
SafeRead(ifstream &stream, T &data)
-{ SafeRead(stream, &data, sizeof(data)); }
+{
+ SafeRead(stream, &data, sizeof(data));
+}
+
+template<class T>
+void
+SafeReadSwap(ifstream &stream, T &data)
+{
+ SafeRead(stream, &data, sizeof(data));
+ data = htoa(data);
+}
bool
CowDiskImage::open(const string &file)
@@ -246,21 +257,21 @@ CowDiskImage::open(const string &file)
panic("Could not open %s: Invalid magic", file);
uint32_t major, minor;
- SafeRead(stream, major);
- SafeRead(stream, minor);
+ SafeReadSwap(stream, major);
+ SafeReadSwap(stream, minor);
if (major != VersionMajor && minor != VersionMinor)
panic("Could not open %s: invalid version %d.%d != %d.%d",
file, major, minor, VersionMajor, VersionMinor);
uint64_t sector_count;
- SafeRead(stream, sector_count);
+ SafeReadSwap(stream, sector_count);
table = new SectorTable(sector_count);
for (uint64_t i = 0; i < sector_count; i++) {
uint64_t offset;
- SafeRead(stream, offset);
+ SafeReadSwap(stream, offset);
Sector *sector = new Sector;
SafeRead(stream, sector, sizeof(Sector));
@@ -300,8 +311,17 @@ SafeWrite(ofstream &stream, const void *data, int count)
template<class T>
void
SafeWrite(ofstream &stream, const T &data)
-{ SafeWrite(stream, &data, sizeof(data)); }
+{
+ SafeWrite(stream, &data, sizeof(data));
+}
+template<class T>
+void
+SafeWriteSwap(ofstream &stream, const T &data)
+{
+ T swappeddata = htoa(data);
+ SafeWrite(stream, &swappeddata, sizeof(data));
+}
void
CowDiskImage::save()
{
@@ -322,9 +342,9 @@ CowDiskImage::save(const string &file)
memcpy(&magic, "COWDISK!", sizeof(magic));
SafeWrite(stream, magic);
- SafeWrite(stream, (uint32_t)VersionMajor);
- SafeWrite(stream, (uint32_t)VersionMinor);
- SafeWrite(stream, (uint64_t)table->size());
+ SafeWriteSwap(stream, (uint32_t)VersionMajor);
+ SafeWriteSwap(stream, (uint32_t)VersionMinor);
+ SafeWriteSwap(stream, (uint64_t)table->size());
uint64_t size = table->size();
SectorTable::iterator iter = table->begin();
@@ -334,7 +354,7 @@ CowDiskImage::save(const string &file)
if (iter == end)
panic("Incorrect Table Size during save of COW disk image");
- SafeWrite(stream, (uint64_t)(*iter).first);
+ SafeWriteSwap(stream, (uint64_t)(*iter).first);
SafeWrite(stream, (*iter).second->data, sizeof(Sector));
++iter;
}
diff --git a/dev/ethertap.cc b/dev/ethertap.cc
index a0d2eda8d..edc400760 100644
--- a/dev/ethertap.cc
+++ b/dev/ethertap.cc
@@ -30,7 +30,7 @@
* Interface to connect a simulated ethernet device to the real world
*/
-#if defined(__OpenBSD__)
+#if defined(__OpenBSD__) || defined(__APPLE__)
#include <sys/param.h>
#endif
#include <netinet/in.h>
diff --git a/dev/pcidev.cc b/dev/pcidev.cc
index 01f336ff8..7b13aac80 100644
--- a/dev/pcidev.cc
+++ b/dev/pcidev.cc
@@ -75,7 +75,8 @@ PciDev::ReadConfig(int offset, int size, uint8_t *data)
{
switch(size) {
case sizeof(uint32_t):
- memcpy((uint32_t*)data, config.data + offset, sizeof(uint32_t));
+ memcpy((uint8_t*)data, config.data + offset, sizeof(uint32_t));
+ *(uint32_t*)data = htoa(*(uint32_t*)data);
DPRINTF(PCIDEV,
"read device: %#x function: %#x register: %#x %d bytes: data: %#x\n",
deviceNum, functionNum, offset, size,
@@ -83,7 +84,8 @@ PciDev::ReadConfig(int offset, int size, uint8_t *data)
break;
case sizeof(uint16_t):
- memcpy((uint16_t*)data, config.data + offset, sizeof(uint16_t));
+ memcpy((uint8_t*)data, config.data + offset, sizeof(uint16_t));
+ *(uint16_t*)data = htoa(*(uint16_t*)data);
DPRINTF(PCIDEV,
"read device: %#x function: %#x register: %#x %d bytes: data: %#x\n",
deviceNum, functionNum, offset, size,
@@ -282,18 +284,18 @@ PciDev::unserialize(Checkpoint *cp, const std::string &section)
BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigData)
- Param<int> VendorID;
- Param<int> DeviceID;
- Param<int> Command;
- Param<int> Status;
- Param<int> Revision;
- Param<int> ProgIF;
- Param<int> SubClassCode;
- Param<int> ClassCode;
- Param<int> CacheLineSize;
- Param<int> LatencyTimer;
- Param<int> HeaderType;
- Param<int> BIST;
+ Param<uint16_t> VendorID;
+ Param<uint16_t> DeviceID;
+ Param<uint16_t> Command;
+ Param<uint16_t> Status;
+ Param<uint8_t> Revision;
+ Param<uint8_t> ProgIF;
+ Param<uint8_t> SubClassCode;
+ Param<uint8_t> ClassCode;
+ Param<uint8_t> CacheLineSize;
+ Param<uint8_t> LatencyTimer;
+ Param<uint8_t> HeaderType;
+ Param<uint8_t> BIST;
Param<uint32_t> BAR0;
Param<uint32_t> BAR1;
Param<uint32_t> BAR2;
@@ -301,13 +303,13 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigData)
Param<uint32_t> BAR4;
Param<uint32_t> BAR5;
Param<uint32_t> CardbusCIS;
- Param<int> SubsystemVendorID;
- Param<int> SubsystemID;
+ Param<uint16_t> SubsystemVendorID;
+ Param<uint16_t> SubsystemID;
Param<uint32_t> ExpansionROM;
- Param<int> InterruptLine;
- Param<int> InterruptPin;
- Param<int> MinimumGrant;
- Param<int> MaximumLatency;
+ Param<uint8_t> InterruptLine;
+ Param<uint8_t> InterruptPin;
+ Param<uint8_t> MinimumGrant;
+ Param<uint8_t> MaximumLatency;
Param<uint32_t> BAR0Size;
Param<uint32_t> BAR1Size;
Param<uint32_t> BAR2Size;
@@ -358,33 +360,33 @@ CREATE_SIM_OBJECT(PciConfigData)
{
PciConfigData *data = new PciConfigData(getInstanceName());
- data->config.hdr.vendor = VendorID;
- data->config.hdr.device = DeviceID;
- data->config.hdr.command = Command;
- data->config.hdr.status = Status;
- data->config.hdr.revision = Revision;
- data->config.hdr.progIF = ProgIF;
- data->config.hdr.subClassCode = SubClassCode;
- data->config.hdr.classCode = ClassCode;
- data->config.hdr.cacheLineSize = CacheLineSize;
- data->config.hdr.latencyTimer = LatencyTimer;
- data->config.hdr.headerType = HeaderType;
- data->config.hdr.bist = BIST;
-
- data->config.hdr.pci0.baseAddr0 = BAR0;
- data->config.hdr.pci0.baseAddr1 = BAR1;
- data->config.hdr.pci0.baseAddr2 = BAR2;
- data->config.hdr.pci0.baseAddr3 = BAR3;
- data->config.hdr.pci0.baseAddr4 = BAR4;
- data->config.hdr.pci0.baseAddr5 = BAR5;
- data->config.hdr.pci0.cardbusCIS = CardbusCIS;
- data->config.hdr.pci0.subsystemVendorID = SubsystemVendorID;
- data->config.hdr.pci0.subsystemID = SubsystemVendorID;
- data->config.hdr.pci0.expansionROM = ExpansionROM;
- data->config.hdr.pci0.interruptLine = InterruptLine;
- data->config.hdr.pci0.interruptPin = InterruptPin;
- data->config.hdr.pci0.minimumGrant = MinimumGrant;
- data->config.hdr.pci0.maximumLatency = MaximumLatency;
+ data->config.hdr.vendor = htoa(VendorID);
+ data->config.hdr.device = htoa(DeviceID);
+ data->config.hdr.command = htoa(Command);
+ data->config.hdr.status = htoa(Status);
+ data->config.hdr.revision = htoa(Revision);
+ data->config.hdr.progIF = htoa(ProgIF);
+ data->config.hdr.subClassCode = htoa(SubClassCode);
+ data->config.hdr.classCode = htoa(ClassCode);
+ data->config.hdr.cacheLineSize = htoa(CacheLineSize);
+ data->config.hdr.latencyTimer = htoa(LatencyTimer);
+ data->config.hdr.headerType = htoa(HeaderType);
+ data->config.hdr.bist = htoa(BIST);
+
+ data->config.hdr.pci0.baseAddr0 = htoa(BAR0);
+ data->config.hdr.pci0.baseAddr1 = htoa(BAR1);
+ data->config.hdr.pci0.baseAddr2 = htoa(BAR2);
+ data->config.hdr.pci0.baseAddr3 = htoa(BAR3);
+ data->config.hdr.pci0.baseAddr4 = htoa(BAR4);
+ data->config.hdr.pci0.baseAddr5 = htoa(BAR5);
+ data->config.hdr.pci0.cardbusCIS = htoa(CardbusCIS);
+ data->config.hdr.pci0.subsystemVendorID = htoa(SubsystemVendorID);
+ data->config.hdr.pci0.subsystemID = htoa(SubsystemVendorID);
+ data->config.hdr.pci0.expansionROM = htoa(ExpansionROM);
+ data->config.hdr.pci0.interruptLine = htoa(InterruptLine);
+ data->config.hdr.pci0.interruptPin = htoa(InterruptPin);
+ data->config.hdr.pci0.minimumGrant = htoa(MinimumGrant);
+ data->config.hdr.pci0.maximumLatency = htoa(MaximumLatency);
data->BARSize[0] = BAR0Size;
data->BARSize[1] = BAR1Size;
diff --git a/dev/tsunami_uart.cc b/dev/tsunami_uart.cc
index 84eb80c8a..c6da02cf4 100644
--- a/dev/tsunami_uart.cc
+++ b/dev/tsunami_uart.cc
@@ -214,7 +214,7 @@ TsunamiUart::write(MemReqPtr &req, const uint8_t *data)
case 0x0: // Data register (TX)
char ourchar;
- ourchar = *(uint64_t *)data;
+ ourchar = *(uint8_t *)data;
if ((isprint(ourchar) || iscntrl(ourchar)) && (ourchar != 0x0C))
cons->out(ourchar);
cons->clearInt(CONS_INT_TX);
diff --git a/kern/linux/linux_system.cc b/kern/linux/linux_system.cc
index 6287ce470..4b3f32f9c 100644
--- a/kern/linux/linux_system.cc
+++ b/kern/linux/linux_system.cc
@@ -141,7 +141,7 @@ LinuxSystem::LinuxSystem(const string _name, const uint64_t _init_param,
physmem->dma_addr(paddr, sizeof(uint64_t));
if (est_cycle_frequency)
- *(uint64_t *)est_cycle_frequency = ticksPerSecond;
+ *(uint64_t *)est_cycle_frequency = htoa(ticksPerSecond);
}
@@ -179,8 +179,8 @@ LinuxSystem::LinuxSystem(const string _name, const uint64_t _init_param,
char *hwprb = (char *)physmem->dma_addr(paddr, sizeof(uint64_t));
if (hwprb) {
- *(uint64_t*)(hwprb+0x50) = 34; // Tsunami
- *(uint64_t*)(hwprb+0x58) = (1<<10); // Plain DP264
+ *(uint64_t*)(hwprb+0x50) = htoa(ULL(34)); // Tsunami
+ *(uint64_t*)(hwprb+0x58) = htoa(ULL(1)<<10); // Plain DP264
}
else
panic("could not translate hwprb addr to set system type/variation\n");
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 06:32:06 +0000