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-rw-r--r--arch/mips/isa_desc/formats.h15
-rw-r--r--arch/mips/isa_desc/formats/basic.format2
-rw-r--r--arch/mips/isa_desc/formats/branch.format8
-rw-r--r--arch/mips/isa_desc/formats/integerop.format10
-rw-r--r--arch/mips/isa_desc/formats/mem.format10
-rw-r--r--arch/mips/isa_desc/formats/noop.format6
-rw-r--r--arch/mips/isa_desc/formats/trap.format6
-rw-r--r--arch/mips/isa_traits.cc9
-rw-r--r--arch/mips/isa_traits.hh18
9 files changed, 44 insertions, 40 deletions
diff --git a/arch/mips/isa_desc/formats.h b/arch/mips/isa_desc/formats.h
index 733a093f5..404314c7a 100644
--- a/arch/mips/isa_desc/formats.h
+++ b/arch/mips/isa_desc/formats.h
@@ -1,19 +1,22 @@
//Include the basic format
//Templates from this format are used later
-##include "m5/arch/sparc/isa_desc/formats/basic.format"
+##include "m5/arch/mips/isa_desc/formats/basic.format"
//Include the integerOp and integerOpCc format
-##include "m5/arch/sparc/isa_desc/formats/integerop.format"
+##include "m5/arch/mips/isa_desc/formats/integerop.format"
+
+//Include the floatOp format
+##include "m5/arch/mips/isa_desc/formats/floatop.format"
//Include the mem format
-##include "m5/arch/sparc/isa_desc/formats/mem.format"
+##include "m5/arch/mips/isa_desc/formats/mem.format"
//Include the trap format
-##include "m5/arch/sparc/isa_desc/formats/trap.format"
+##include "m5/arch/mips/isa_desc/formats/trap.format"
//Include the branch format
-##include "m5/arch/sparc/isa_desc/formats/branch.format"
+##include "m5/arch/mips/isa_desc/formats/branch.format"
//Include the noop format
-##include "m5/arch/sparc/isa_desc/formats/noop.format"
+##include "m5/arch/mips/isa_desc/formats/noop.format"
diff --git a/arch/mips/isa_desc/formats/basic.format b/arch/mips/isa_desc/formats/basic.format
index 1994df41c..8fba9845a 100644
--- a/arch/mips/isa_desc/formats/basic.format
+++ b/arch/mips/isa_desc/formats/basic.format
@@ -57,7 +57,7 @@ def template BasicDecodeWithMnemonic {{
// The most basic instruction format... used only for a few misc. insts
def format BasicOperate(code, *flags) {{
- iop = InstObjParams(name, Name, 'SparcStaticInst', CodeBlock(code), flags)
+ iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecode.subst(iop)
diff --git a/arch/mips/isa_desc/formats/branch.format b/arch/mips/isa_desc/formats/branch.format
index c4c0a90af..5327f30e8 100644
--- a/arch/mips/isa_desc/formats/branch.format
+++ b/arch/mips/isa_desc/formats/branch.format
@@ -7,12 +7,12 @@ output header {{
/**
* Base class for integer operations.
*/
- class Branch : public SparcStaticInst
+ class Branch : public MipsStaticInst
{
protected:
/// Constructor
- Branch(const char *mnem, MachInst _machInst, OpClass __opClass) : SparcStaticInst(mnem, _machInst, __opClass)
+ Branch(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
{
}
@@ -41,7 +41,7 @@ def template BranchExecute {{
}
//If we have an exception for some reason,
//deal with it
- catch(SparcException except)
+ catch(MipsException except)
{
//Deal with exception
return No_Fault;
@@ -58,7 +58,7 @@ def template BranchExecute {{
def format Branch(code, *opt_flags) {{
orig_code = code
cblk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
+ iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecodeWithMnemonic.subst(iop)
diff --git a/arch/mips/isa_desc/formats/integerop.format b/arch/mips/isa_desc/formats/integerop.format
index 275a346d3..6fa7feed3 100644
--- a/arch/mips/isa_desc/formats/integerop.format
+++ b/arch/mips/isa_desc/formats/integerop.format
@@ -7,12 +7,12 @@ output header {{
/**
* Base class for integer operations.
*/
- class IntegerOp : public SparcStaticInst
+ class IntegerOp : public MipsStaticInst
{
protected:
/// Constructor
- IntegerOp(const char *mnem, MachInst _machInst, OpClass __opClass) : SparcStaticInst(mnem, _machInst, __opClass)
+ IntegerOp(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
{
}
@@ -46,7 +46,7 @@ def template IntegerExecute {{
}
//If we have an exception for some reason,
//deal with it
- catch(SparcException except)
+ catch(MipsException except)
{
//Deal with exception
return No_Fault;
@@ -82,7 +82,7 @@ def format IntegerOp(code, *opt_flags) {{
for (marker, value) in (('ivValue', '0'), ('icValue', '0'),
('xvValue', '0'), ('xcValue', '0')):
code.replace(marker, value)
- iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
+ iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecodeWithMnemonic.subst(iop)
@@ -102,7 +102,7 @@ def format IntegerOpCc(code, icValue, ivValue, xcValue, xvValue, *opt_flags) {{
for (marker, value) in (('ivValue', ivValue), ('icValue', icValue),
('xvValue', xvValue), ('xcValue', xcValue)):
code.replace(marker, value)
- iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
+ iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecodeWithMnemonic.subst(iop)
diff --git a/arch/mips/isa_desc/formats/mem.format b/arch/mips/isa_desc/formats/mem.format
index abc00b6f2..5ed5237c5 100644
--- a/arch/mips/isa_desc/formats/mem.format
+++ b/arch/mips/isa_desc/formats/mem.format
@@ -7,12 +7,12 @@ output header {{
/**
* Base class for integer operations.
*/
- class Mem : public SparcStaticInst
+ class Mem : public MipsStaticInst
{
protected:
/// Constructor
- Mem(const char *mnem, MachInst _machInst, OpClass __opClass) : SparcStaticInst(mnem, _machInst, __opClass)
+ Mem(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
{
}
@@ -41,7 +41,7 @@ def template MemExecute {{
}
//If we have an exception for some reason,
//deal with it
- catch(SparcException except)
+ catch(MipsException except)
{
//Deal with exception
return No_Fault;
@@ -58,7 +58,7 @@ def template MemExecute {{
def format Mem(code, *opt_flags) {{
orig_code = code
cblk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
+ iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecodeWithMnemonic.subst(iop)
@@ -69,7 +69,7 @@ def format Mem(code, *opt_flags) {{
def format Cas(code, *opt_flags) {{
orig_code = code
cblk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
+ iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecodeWithMnemonic.subst(iop)
diff --git a/arch/mips/isa_desc/formats/noop.format b/arch/mips/isa_desc/formats/noop.format
index bc83e3261..b1ece654d 100644
--- a/arch/mips/isa_desc/formats/noop.format
+++ b/arch/mips/isa_desc/formats/noop.format
@@ -7,12 +7,12 @@ output header {{
/**
* Base class for integer operations.
*/
- class Noop : public SparcStaticInst
+ class Noop : public MipsStaticInst
{
protected:
/// Constructor
- Noop(const char *mnem, MachInst _machInst, OpClass __opClass) : SparcStaticInst(mnem, _machInst, __opClass)
+ Noop(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
{
}
@@ -39,7 +39,7 @@ def template NoopExecute {{
def format Noop(code, *opt_flags) {{
orig_code = code
cblk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
+ iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecodeWithMnemonic.subst(iop)
diff --git a/arch/mips/isa_desc/formats/trap.format b/arch/mips/isa_desc/formats/trap.format
index bee77fe69..78f8d87b0 100644
--- a/arch/mips/isa_desc/formats/trap.format
+++ b/arch/mips/isa_desc/formats/trap.format
@@ -7,12 +7,12 @@ output header {{
/**
* Base class for integer operations.
*/
- class Trap : public SparcStaticInst
+ class Trap : public MipsStaticInst
{
protected:
/// Constructor
- Trap(const char *mnem, MachInst _machInst, OpClass __opClass) : SparcStaticInst(mnem, _machInst, __opClass)
+ Trap(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
{
}
@@ -45,7 +45,7 @@ def template TrapExecute {{
def format Trap(code, *opt_flags) {{
orig_code = code
cblk = CodeBlock(code)
- iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
+ iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags)
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecodeWithMnemonic.subst(iop)
diff --git a/arch/mips/isa_traits.cc b/arch/mips/isa_traits.cc
index c7a25f88d..90a85feb6 100644
--- a/arch/mips/isa_traits.cc
+++ b/arch/mips/isa_traits.cc
@@ -26,15 +26,16 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "arch/sparc/isa_traits.hh"
+#include "arch/mips/isa_traits.hh"
#include "cpu/static_inst.hh"
#include "sim/serialize.hh"
// Alpha UNOP (ldq_u r31,0(r0))
-const MachInst SPARCISA::NoopMachInst = 0x2ffe0000;
+// @todo: fix to MIPS specific
+const MachInst MipsISA::NoopMachInst = 0x2ffe0000;
void
-SPARCISA::RegFile::serialize(std::ostream &os)
+MipsISA::RegFile::serialize(std::ostream &os)
{
intRegFile.serialize(os);
floatRegFile.serialize(os);
@@ -45,7 +46,7 @@ SPARCISA::RegFile::serialize(std::ostream &os)
void
-AlphaISA::RegFile::unserialize(Checkpoint *cp, const std::string &section)
+MipsISA::RegFile::unserialize(Checkpoint *cp, const std::string &section)
{
intRegFile.unserialize(cp, section);
floatRegFile.unserialize(cp, section);
diff --git a/arch/mips/isa_traits.hh b/arch/mips/isa_traits.hh
index 9513b99fc..e8401cefb 100644
--- a/arch/mips/isa_traits.hh
+++ b/arch/mips/isa_traits.hh
@@ -26,18 +26,18 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __ARCH_SPARC_ISA_TRAITS_HH__
-#define __ARCH_SPARC_ISA_TRAITS_HH__
+#ifndef __ARCH_MIPS_ISA_TRAITS_HH__
+#define __ARCH_MIPS_ISA_TRAITS_HH__
-#include "arch/sparc/faults.hh"
+#include "arch/mips/faults.hh"
#include "base/misc.hh"
#include "sim/host.hh"
class FastCPU;
-//class FullCPU;
-//class Checkpoint;
+class FullCPU;
+class Checkpoint;
-#define TARGET_SPARC
+#define TARGET_MIPS
template <class ISA> class StaticInst;
template <class ISA> class StaticInstPtr;
@@ -48,7 +48,7 @@ template <class ISA> class StaticInstPtr;
// int ITB_ASN_ASN(uint64_t reg);
//}
-class SPARCISA
+class MipsISA
{
public:
@@ -463,7 +463,7 @@ class SPARCISA
};
-typedef SPARCISA TheISA;
+typedef MIPSISA TheISA;
typedef TheISA::MachInst MachInst;
typedef TheISA::Addr Addr;
@@ -525,4 +525,4 @@ class SyscallReturn {
#include "arch/alpha/ev5.hh"
#endif
-#endif // __ARCH_SPARC_ISA_TRAITS_HH__
+#endif // __ARCH_MIPS_ISA_TRAITS_HH__
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 23:53:37 +0000