5 files changed, 46 insertions, 39 deletions

diff --git a/src/mem/bus.cc b/src/mem/bus.cc
index 4dfcbad1c..d4157e14d 100644
--- a/src/mem/bus.cc
+++ b/src/mem/bus.cc
@@ -59,8 +59,7 @@ BaseBus::BaseBus(const BaseBusParams *p)
       headerCycles(p->header_cycles), width(p->width),
       defaultPortID(InvalidPortID),
       useDefaultRange(p->use_default_range),
-      defaultBlockSize(p->block_size),
-      cachedBlockSize(0), cachedBlockSizeValid(false)
+      blockSize(p->block_size)
 {}
 
 BaseBus::~BaseBus()
@@ -76,6 +75,34 @@ BaseBus::~BaseBus()
     }
 }
 
+void
+BaseBus::init()
+{
+    // determine the maximum peer block size, look at both the
+    // connected master and slave modules
+    uint32_t peer_block_size = 0;
+
+    for (MasterPortConstIter m = masterPorts.begin(); m != masterPorts.end();
+         ++m) {
+        peer_block_size = std::max((*m)->peerBlockSize(), peer_block_size);
+    }
+
+    for (SlavePortConstIter s = slavePorts.begin(); s != slavePorts.end();
+         ++s) {
+        peer_block_size = std::max((*s)->peerBlockSize(), peer_block_size);
+    }
+
+    // if the peers do not have a block size, use the default value
+    // set through the bus parameters
+    if (peer_block_size != 0)
+        blockSize = peer_block_size;
+
+    // check if the block size is a value known to work
+    if (blockSize != 16 || blockSize != 32 || blockSize != 64 ||
+        blockSize != 128)
+        warn_once("Block size is neither 16, 32, 64 or 128 bytes.\n");
+}
+
 MasterPort &
 BaseBus::getMasterPort(const std::string &if_name, int idx)
 {
@@ -452,34 +479,9 @@ BaseBus::getAddrRanges() const
 }
 
 unsigned
-BaseBus::findBlockSize()
+BaseBus::deviceBlockSize() const
 {
-    if (cachedBlockSizeValid)
-        return cachedBlockSize;
-
-    unsigned max_bs = 0;
-
-    for (MasterPortConstIter m = masterPorts.begin(); m != masterPorts.end();
-         ++m) {
-        unsigned tmp_bs = (*m)->peerBlockSize();
-        if (tmp_bs > max_bs)
-            max_bs = tmp_bs;
-    }
-
-    for (SlavePortConstIter s = slavePorts.begin(); s != slavePorts.end();
-         ++s) {
-        unsigned tmp_bs = (*s)->peerBlockSize();
-        if (tmp_bs > max_bs)
-            max_bs = tmp_bs;
-    }
-    if (max_bs == 0)
-        max_bs = defaultBlockSize;
-
-    if (max_bs != 64 && max_bs != 32)
-        warn_once("Blocksize found to not be 32 or 64... hmm... probably not.\n");
-    cachedBlockSize = max_bs;
-    cachedBlockSizeValid = true;
-    return max_bs;
+    return blockSize;
 }
 
 template <typename PortClass>
diff --git a/src/mem/bus.hh b/src/mem/bus.hh
index 95699cf22..a3469a478 100644
--- a/src/mem/bus.hh
+++ b/src/mem/bus.hh
@@ -321,11 +321,13 @@ class BaseBus : public MemObject
     Tick calcPacketTiming(PacketPtr pkt);
 
     /**
-     * Ask everyone on the bus what their size is
+     * Ask everyone on the bus what their size is and determine the
+     * bus size as either the maximum, or if no device specifies a
+     * block size return the default.
      *
-     * @return the max of all the sizes
+     * @return the max of all the sizes or the default if none is set
      */
-    unsigned findBlockSize();
+    unsigned deviceBlockSize() const;
 
     std::set<PortID> inRecvRangeChange;
 
@@ -348,9 +350,7 @@ class BaseBus : public MemObject
        addresses not handled by another port to default device. */
     const bool useDefaultRange;
 
-    const uint32_t defaultBlockSize;
-    uint32_t cachedBlockSize;
-    bool cachedBlockSizeValid;
+    uint32_t blockSize;
 
     BaseBus(const BaseBusParams *p);
 
@@ -358,6 +358,8 @@ class BaseBus : public MemObject
 
   public:
 
+    virtual void init();
+
     /** A function used to return the port associated with this bus object. */
     virtual MasterPort& getMasterPort(const std::string& if_name, int idx = -1);
     virtual SlavePort& getSlavePort(const std::string& if_name, int idx = -1);
diff --git a/src/mem/coherent_bus.cc b/src/mem/coherent_bus.cc
index b0dedfaf4..98d86f3f0 100644
--- a/src/mem/coherent_bus.cc
+++ b/src/mem/coherent_bus.cc
@@ -90,6 +90,9 @@ CoherentBus::CoherentBus(const CoherentBusParams *p)
 void
 CoherentBus::init()
 {
+    // the base class is responsible for determining the block size
+    BaseBus::init();
+
     // iterate over our slave ports and determine which of our
     // neighbouring master ports are snooping and add them as snoopers
     for (SlavePortConstIter p = slavePorts.begin(); p != slavePorts.end();
diff --git a/src/mem/coherent_bus.hh b/src/mem/coherent_bus.hh
index 8941d0271..89a759546 100644
--- a/src/mem/coherent_bus.hh
+++ b/src/mem/coherent_bus.hh
@@ -140,7 +140,7 @@ class CoherentBus : public BaseBus
          * Get the maximum block size as seen by the bus.
          */
         virtual unsigned deviceBlockSize() const
-        { return bus.findBlockSize(); }
+        { return bus.deviceBlockSize(); }
 
     };
 
@@ -211,7 +211,7 @@ class CoherentBus : public BaseBus
         // take the max of it. This might need to be changed a bit if we ever
         // support multiple block sizes.
         virtual unsigned deviceBlockSize() const
-        { return bus.findBlockSize(); }
+        { return bus.deviceBlockSize(); }
 
     };
 
diff --git a/src/mem/noncoherent_bus.hh b/src/mem/noncoherent_bus.hh
index e8c1ab57a..16cf7deda 100644
--- a/src/mem/noncoherent_bus.hh
+++ b/src/mem/noncoherent_bus.hh
@@ -134,7 +134,7 @@ class NoncoherentBus : public BaseBus
          * Get the maximum block size as seen by the bus.
          */
         virtual unsigned deviceBlockSize() const
-        { return bus.findBlockSize(); }
+        { return bus.deviceBlockSize(); }
 
     };
 
@@ -179,7 +179,7 @@ class NoncoherentBus : public BaseBus
          * Get the maximum block size as seen by the bus.
          */
         virtual unsigned deviceBlockSize() const
-        { return bus.findBlockSize(); }
+        { return bus.deviceBlockSize(); }
 
     };