diff options
| -rw-r--r-- | configs/common/Benchmarks.py | 6 | ||||
| -rw-r--r-- | configs/common/CpuConfig.py | 29 | ||||
| -rw-r--r-- | configs/common/FSConfig.py | 7 | ||||
| -rw-r--r-- | configs/common/Options.py | 12 | ||||
| -rw-r--r-- | configs/common/Simulation.py | 8 | ||||
| -rw-r--r-- | configs/example/se.py | 4 | ||||
| -rw-r--r-- | configs/example/spec06_benchmarks.py | 336 | ||||
| -rw-r--r-- | configs/example/spec06_config.py | 406 | ||||
| -rw-r--r-- | configs/ruby/MESI_Two_Level.py | 2 | ||||
| -rw-r--r-- | configs/ruby/Ruby.py | 3 |
10 files changed, 805 insertions, 8 deletions
diff --git a/configs/common/Benchmarks.py b/configs/common/Benchmarks.py index b7d10b563..b362e42e4 100644 --- a/configs/common/Benchmarks.py +++ b/configs/common/Benchmarks.py @@ -51,17 +51,17 @@ class SysConfig: if self.memsize: return self.memsize else: - return '128MB' + return '512MB' def disk(self): if self.diskname: return disk(self.diskname) elif buildEnv['TARGET_ISA'] == 'alpha': - return env.get('LINUX_IMAGE', disk('linux-latest.img')) + return env.get('LINUX_IMAGE', disk('alpha-parsec.img')) elif buildEnv['TARGET_ISA'] == 'x86': return env.get('LINUX_IMAGE', disk('x86root.img')) elif buildEnv['TARGET_ISA'] == 'arm': - return env.get('LINUX_IMAGE', disk('linux-aarch32-ael.img')) + return env.get('LINUX_IMAGE', disk('aarch64-ubuntu-trusty-headless.img')) elif buildEnv['TARGET_ISA'] == 'sparc': return env.get('LINUX_IMAGE', disk('disk.s10hw2')) else: diff --git a/configs/common/CpuConfig.py b/configs/common/CpuConfig.py index f0d009e95..43539ee4d 100644 --- a/configs/common/CpuConfig.py +++ b/configs/common/CpuConfig.py @@ -100,6 +100,35 @@ def cpu_names(): """Return a list of valid CPU names.""" return _cpu_classes.keys() +# [InvisiSpec] add knob to configure the CPU modes/simulation schemes +def config_scheme(cpu_cls, cpu_list, options): + if issubclass(cpu_cls, m5.objects.DerivO3CPU): + # Assign the same file name to all cpus for now. + if options.needsTSO==None or options.scheme==None: + fatal("Need to provide needsTSO and scheme " + "to run simulation with DerivO3CPU") + + print("**********") + print("info: Configure for DerivO3CPU. needsTSO=%d; scheme=%s"\ + % (options.needsTSO, options.scheme)) + print("**********") + for cpu in cpu_list: + if options.needsTSO: + cpu.needsTSO = True + else: + cpu.needsTSO = False + + if options.allowSpecBuffHit: + cpu.allowSpecBuffHit = True + else: + cpu.allowSpecBuffHit = False + if len(options.scheme)!=0: + cpu.simulateScheme = options.scheme + else: + print("not DerivO3CPU") + + + def config_etrace(cpu_cls, cpu_list, options): if issubclass(cpu_cls, m5.objects.DerivO3CPU): # Assign the same file name to all cpus for now. This must be diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index 674761634..da3ceaf73 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -130,8 +130,8 @@ def makeLinuxAlphaSystem(mem_mode, mdesc=None, ruby=False, cmdline=None): self.intrctrl = IntrControl() self.mem_mode = mem_mode self.terminal = Terminal() - self.kernel = binary('vmlinux') - self.pal = binary('ts_osfpal') + self.kernel = binary('alpha-vmlinux_2.6.27') + self.pal = binary('tsb_osfpal') self.console = binary('console') if not cmdline: cmdline = 'root=/dev/hda1 console=ttyS0' @@ -676,7 +676,8 @@ def makeLinuxX86System(mem_mode, numCPUs=1, mdesc=None, Ruby=False, if not cmdline: cmdline = 'earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1' self.boot_osflags = fillInCmdline(mdesc, cmdline) - self.kernel = binary('x86_64-vmlinux-2.6.22.9') + if self.kernel is None: + self.kernel = binary('x86_64-vmlinux-2.6.22.9') return self diff --git a/configs/common/Options.py b/configs/common/Options.py index c36dc384e..48fecac59 100644 --- a/configs/common/Options.py +++ b/configs/common/Options.py @@ -297,7 +297,17 @@ def addCommonOptions(parser): parser.add_option("--arm-iset", default="arm", type="choice", choices=["arm", "thumb", "aarch64"], help="ARM instruction set.") - + # [InvisiSpec] add options to configure needsTSO and scheme + parser.add_option("--scheme", default=None, action="store", type="choice", + choices=["UnsafeBaseline", "FuturisticSafeFence", + "SpectreSafeFence", "FuturisticSafeInvisibleSpec", + "SpectreSafeInvisibleSpec"], + help="choose baseline or defense designs to evaluate") + parser.add_option("--needsTSO", default=None, action="store", type="int", + help="Select TSO or RC. Set unzero to use TSO.") + parser.add_option("--allowSpecBuffHit", default=None, action="store", + type="int", + help="Allow to reuse spec buffer entries. Set unzero to reuse.") def addSEOptions(parser): # Benchmark options diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py index 23a778397..e194b05dc 100644 --- a/configs/common/Simulation.py +++ b/configs/common/Simulation.py @@ -463,6 +463,14 @@ def run(options, root, testsys, cpu_class): switch_cpus = [cpu_class(switched_out=True, cpu_id=(i)) for i in xrange(np)] + # [InvisiSpec] configure simualtion scheme + if cpu_class == DerivO3CPU: + #fatal("Ruby can only be used with DerivO3CPU!") + CpuConfig.config_scheme(cpu_class, switch_cpus, options) + else: + warn("restoring from a checkpoint, " + "but not simulate using DerivO3CPU.") + for i in xrange(np): if options.fast_forward: testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) diff --git a/configs/example/se.py b/configs/example/se.py index f12d4a994..7707cf112 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -265,5 +265,9 @@ else: CacheConfig.config_cache(options, system) MemConfig.config_mem(options, system) +# [InvisiSpec] Configure simulation scheme +if CPUClass == DerivO3CPU: + CpuConfig.config_scheme(CPUClass, system.cpu, options) + root = Root(full_system = False, system = system) Simulation.run(options, root, system, FutureClass) diff --git a/configs/example/spec06_benchmarks.py b/configs/example/spec06_benchmarks.py new file mode 100644 index 000000000..0ed070f23 --- /dev/null +++ b/configs/example/spec06_benchmarks.py @@ -0,0 +1,336 @@ +import m5 +from m5.objects import * + +# These three directory paths are not currently used. +#gem5_dir = '<FULL_PATH_TO_YOUR_GEM5_INSTALL>' +#spec_dir = '<FULL_PATH_TO_YOUR_SPEC_CPU2006_INSTALL>' +#out_dir = '<FULL_PATH_TO_DESIRED_OUTPUT_DIRECTORY>' + +x86_suffix = '_base.x86_64' +#'_base.my-alpha' + +#temp +#binary_dir = spec_dir +#data_dir = spec_dir + +#400.perlbench +perlbench = Process() # Update June 7, 2017: This used to be LiveProcess() +perlbench.executable = 'perlbench' + x86_suffix +# TEST CMDS +#perlbench.cmd = [perlbench.executable] + ['-I.', '-I./lib', 'attrs.pl'] +# REF CMDS +perlbench.cmd = [perlbench.executable] + ['-I./lib', 'checkspam.pl', '2500', '5', '25', '11', '150', '1', '1', '1', '1'] +#perlbench.cmd = [perlbench.executable] + ['-I./lib', 'diffmail.pl', '4', '800', '10', '17', '19', '300'] +#perlbench.cmd = [perlbench.executable] + ['-I./lib', 'splitmail.pl', '1600', '12', '26', '16', '4500'] +#perlbench.output = out_dir+'perlbench.out' + +#401.bzip2 +bzip2 = Process() # Update June 7, 2017: This used to be LiveProcess() +bzip2.executable = 'bzip2' + x86_suffix +# TEST CMDS +#bzip2.cmd = [bzip2.executable] + ['input.program', '5'] +# REF CMDS +bzip2.cmd = [bzip2.executable] + ['input.source', '280'] +#bzip2.cmd = [bzip2.executable] + ['chicken.jpg', '30'] +#bzip2.cmd = [bzip2.executable] + ['liberty.jpg', '30'] +#bzip2.cmd = [bzip2.executable] + ['input.program', '280'] +#bzip2.cmd = [bzip2.executable] + ['text.html', '280'] +#bzip2.cmd = [bzip2.executable] + ['input.combined', '200'] +#bzip2.output = out_dir + 'bzip2.out' + +#403.gcc +gcc = Process() # Update June 7, 2017: This used to be LiveProcess() +gcc.executable = 'gcc' + x86_suffix +# TEST CMDS +#gcc.cmd = [gcc.executable] + ['cccp.i', '-o', 'cccp.s'] +# REF CMDS +gcc.cmd = [gcc.executable] + ['166.i', '-o', '166.s'] +#gcc.cmd = [gcc.executable] + ['200.i', '-o', '200.s'] +#gcc.cmd = [gcc.executable] + ['c-typeck.i', '-o', 'c-typeck.s'] +#gcc.cmd = [gcc.executable] + ['cp-decl.i', '-o', 'cp-decl.s'] +#gcc.cmd = [gcc.executable] + ['expr.i', '-o', 'expr.s'] +#gcc.cmd = [gcc.executable] + ['expr2.i', '-o', 'expr2.s'] +#gcc.cmd = [gcc.executable] + ['g23.i', '-o', 'g23.s'] +#gcc.cmd = [gcc.executable] + ['s04.i', '-o', 's04.s'] +#gcc.cmd = [gcc.executable] + ['scilab.i', '-o', 'scilab.s'] +#gcc.output = out_dir + 'gcc.out' + +#410.bwaves +bwaves = Process() # Update June 7, 2017: This used to be LiveProcess() +bwaves.executable = 'bwaves' + x86_suffix +# TEST CMDS +#bwaves.cmd = [bwaves.executable] +# REF CMDS +bwaves.cmd = [bwaves.executable] +#bwaves.output = out_dir + 'bwaves.out' + +#416.gamess +gamess = Process() # Update June 7, 2017: This used to be LiveProcess() +gamess.executable = 'gamess' + x86_suffix +# TEST CMDS +#gamess.cmd = [gamess.executable] +#gamess.input = 'exam29.config' +# REF CMDS +gamess.cmd = [gamess.executable] +gamess.input = 'cytosine.2.config' +#gamess.cmd = [gamess.executable] +#gamess.input = 'h2ocu2+.gradient.config' +#gamess.cmd = [gamess.executable] +#gamess.input = 'triazolium.config' +#gamess.output = out_dir + 'gamess.out' + +#429.mcf +mcf = Process() # Update June 7, 2017: This used to be LiveProcess() +mcf.executable = 'mcf' + x86_suffix +# TEST CMDS +#mcf.cmd = [mcf.executable] + ['inp.in'] +# REF CMDS +mcf.cmd = [mcf.executable] + ['inp.in'] +#mcf.output = out_dir + 'mcf.out' + +#433.milc +milc = Process() # Update June 7, 2017: This used to be LiveProcess() +milc.executable = 'milc' + x86_suffix +# TEST CMDS +#milc.cmd = [milc.executable] +#milc.input = 'su3imp.in' +# REF CMDS +milc.cmd = [milc.executable] +milc.input = 'su3imp.in' +#milc.output = out_dir + 'milc.out' + +#434.zeusmp +zeusmp = Process() # Update June 7, 2017: This used to be LiveProcess() +zeusmp.executable = 'zeusmp' + x86_suffix +# TEST CMDS +#zeusmp.cmd = [zeusmp.executable] +# REF CMDS +zeusmp.cmd = [zeusmp.executable] +#zeusmp.output = out_dir + 'zeusmp.out' + +#435.gromacs +gromacs = Process() # Update June 7, 2017: This used to be LiveProcess() +gromacs.executable = 'gromacs' + x86_suffix +# TEST CMDS +#gromacs.cmd = [gromacs.executable] + ['-silent','-deffnm', 'gromacs', '-nice','0'] +# REF CMDS +gromacs.cmd = [gromacs.executable] + ['-silent','-deffnm', 'gromacs', '-nice','0'] +#gromacs.output = out_dir + 'gromacs.out' + +#436.cactusADM +cactusADM = Process() # Update June 7, 2017: This used to be LiveProcess() +cactusADM.executable = 'cactusADM' + x86_suffix +# TEST CMDS +#cactusADM.cmd = [cactusADM.executable] + ['benchADM.par'] +# REF CMDS +cactusADM.cmd = [cactusADM.executable] + ['benchADM.par'] +#cactusADM.output = out_dir + 'cactusADM.out' + +#437.leslie3d +leslie3d = Process() # Update June 7, 2017: This used to be LiveProcess() +leslie3d.executable = 'leslie3d' + x86_suffix +# TEST CMDS +#leslie3d.cmd = [leslie3d.executable] +#leslie3d.input = 'leslie3d.in' +# REF CMDS +leslie3d.cmd = [leslie3d.executable] +leslie3d.input = 'leslie3d.in' +#leslie3d.output = out_dir + 'leslie3d.out' + +#444.namd +namd = Process() # Update June 7, 2017: This used to be LiveProcess() +namd.executable = 'namd' + x86_suffix +# TEST CMDS +#namd.cmd = [namd.executable] + ['--input', 'namd.input', '--output', 'namd.out', '--iterations', '1'] +# REF CMDS +namd.cmd = [namd.executable] + ['--input', 'namd.input', '--output', 'namd.out', '--iterations', '38'] +#namd.output = out_dir + 'namd.out' + +#445.gobmk +gobmk = Process() # Update June 7, 2017: This used to be LiveProcess() +gobmk.executable = 'gobmk' + x86_suffix +# TEST CMDS +#gobmk.cmd = [gobmk.executable] + ['--quiet','--mode', 'gtp'] +#gobmk.input = 'dniwog.tst' +# REF CMDS +gobmk.cmd = [gobmk.executable] + ['--quiet','--mode', 'gtp'] +gobmk.input = '13x13.tst' +#gobmk.cmd = [gobmk.executable] + ['--quiet','--mode', 'gtp'] +#gobmk.input = 'nngs.tst' +#gobmk.cmd = [gobmk.executable] + ['--quiet','--mode', 'gtp'] +#gobmk.input = 'score2.tst' +#gobmk.cmd = [gobmk.executable] + ['--quiet','--mode', 'gtp'] +#gobmk.input = 'trevorc.tst' +#gobmk.cmd = [gobmk.executable] + ['--quiet','--mode', 'gtp'] +#gobmk.input = 'trevord.tst' +#gobmk.output = out_dir + 'gobmk.out' + +#447.dealII +####### NOT WORKING ######### +dealII = Process() # Update June 7, 2017: This used to be LiveProcess() +dealII.executable = 'dealII' + x86_suffix +# TEST CMDS +####### NOT WORKING ######### +#dealII.cmd = [gobmk.executable]+['8'] +# REF CMDS +####### NOT WORKING ######### +#dealII.output = out_dir + 'dealII.out' + +#450.soplex +soplex = Process() # Update June 7, 2017: This used to be LiveProcess() +soplex.executable = 'soplex' + x86_suffix +# TEST CMDS +#soplex.cmd = [soplex.executable] + ['-m10000', 'test.mps'] +# REF CMDS +soplex.cmd = [soplex.executable] + ['-m45000', 'pds-50.mps'] +#soplex.cmd = [soplex.executable] + ['-m3500', 'ref.mps'] +#soplex.output = out_dir + 'soplex.out' + +#453.povray +povray = Process() # Update June 7, 2017: This used to be LiveProcess() +povray.executable = 'povray' + x86_suffix +# TEST CMDS +#povray.cmd = [povray.executable] + ['SPEC-benchmark-test.ini'] +# REF CMDS +povray.cmd = [povray.executable] + ['SPEC-benchmark-ref.ini'] +#povray.output = out_dir + 'povray.out' + +#454.calculix +calculix = Process() # Update June 7, 2017: This used to be LiveProcess() +calculix.executable = 'calculix' + x86_suffix +# TEST CMDS +#calculix.cmd = [calculix.executable] + ['-i', 'beampic'] +# REF CMDS +calculix.cmd = [calculix.executable] + ['-i', 'hyperviscoplastic'] +#calculix.output = out_dir + 'calculix.out' + +#456.hmmer +hmmer = Process() # Update June 7, 2017: This used to be LiveProcess() +hmmer.executable = 'hmmer' + x86_suffix +# TEST CMDS +#hmmer.cmd = [hmmer.executable] + ['--fixed', '0', '--mean', '325', '--num', '45000', '--sd', '200', '--seed', '0', 'bombesin.hmm'] +# REF CMDS +hmmer.cmd = [hmmer.executable] + ['nph3.hmm', 'swiss41'] +#hmmer.cmd = [hmmer.executable] + ['--fixed', '0', '--mean', '500', '--num', '500000', '--sd', '350', '--seed', '0', 'retro.hmm'] +#hmmer.output = out_dir + 'hmmer.out' + +#458.sjeng +sjeng = Process() # Update June 7, 2017: This used to be LiveProcess() +sjeng.executable = 'sjeng' + x86_suffix +# TEST CMDS +#sjeng.cmd = [sjeng.executable] + ['test.txt'] +# REF CMDS +sjeng.cmd = [sjeng.executable] + ['ref.txt'] +#sjeng.output = out_dir + 'sjeng.out' + +#459.GemsFDTD +GemsFDTD = Process() # Update June 7, 2017: This used to be LiveProcess() +GemsFDTD.executable = 'GemsFDTD' + x86_suffix +# TEST CMDS +#GemsFDTD.cmd = [GemsFDTD.executable] +# REF CMDS +GemsFDTD.cmd = [GemsFDTD.executable] +#GemsFDTD.output = out_dir + 'GemsFDTD.out' + +#462.libquantum +libquantum = Process() # Update June 7, 2017: This used to be LiveProcess() +libquantum.executable = 'libquantum' + x86_suffix +# TEST CMDS +#libquantum.cmd = [libquantum.executable] + ['33','5'] +# REF CMDS [UPDATE 10/2/2015]: Sparsh Mittal has pointed out the correct input for libquantum should be 1397 and 8, not 1297 and 8. Thanks! +libquantum.cmd = [libquantum.executable] + ['1397','8'] +#libquantum.output = out_dir + 'libquantum.out' + +#464.h264ref +h264ref = Process() # Update June 7, 2017: This used to be LiveProcess() +h264ref.executable = 'h264ref' + x86_suffix +# TEST CMDS +#h264ref.cmd = [h264ref.executable] + ['-d', 'foreman_test_encoder_baseline.cfg'] +# REF CMDS +h264ref.cmd = [h264ref.executable] + ['-d', 'foreman_ref_encoder_baseline.cfg'] +#h264ref.cmd = [h264ref.executable] + ['-d', 'foreman_ref_encoder_main.cfg'] +#h264ref.cmd = [h264ref.executable] + ['-d', 'sss_encoder_main.cfg'] +#h264ref.output = out_dir + 'h264ref.out' + +#465.tonto +tonto = Process() # Update June 7, 2017: This used to be LiveProcess() +tonto.executable = 'tonto' + x86_suffix +# TEST CMDS +#tonto.cmd = [tonto.executable] +# REF CMDS +tonto.cmd = [tonto.executable] +#tonto.output = out_dir + 'tonto.out' + +#470.lbm +lbm = Process() # Update June 7, 2017: This used to be LiveProcess() +lbm.executable = 'lbm' + x86_suffix +# TEST CMDS +#lbm.cmd = [lbm.executable] + ['20', 'reference.dat', '0', '1', '100_100_130_cf_a.of'] +# REF CMDS +lbm.cmd = [lbm.executable] + ['300', 'reference.dat', '0', '0', '100_100_130_ldc.of'] +#lbm.output = out_dir + 'lbm.out' + +#471.omnetpp +omnetpp = Process() # Update June 7, 2017: This used to be LiveProcess() +omnetpp.executable = 'omnetpp' + x86_suffix +# TEST CMDS +#omnetpp.cmd = [omnetpp.executable] + ['omnetpp.ini'] +# REF CMDS +omnetpp.cmd = [omnetpp.executable] + ['omnetpp.ini'] +#omnetpp.output = out_dir + 'omnetpp.out' + +#473.astar +astar = Process() # Update June 7, 2017: This used to be LiveProcess() +astar.executable = 'astar' + x86_suffix +# TEST CMDS +#astar.cmd = [astar.executable] + ['lake.cfg'] +# REF CMDS +astar.cmd = [astar.executable] + ['rivers.cfg'] +#astar.output = out_dir + 'astar.out' + +#481.wrf +wrf = Process() # Update June 7, 2017: This used to be LiveProcess() +wrf.executable = 'wrf' + x86_suffix +# TEST CMDS +#wrf.cmd = [wrf.executable] +# REF CMDS +wrf.cmd = [wrf.executable] +#wrf.output = out_dir + 'wrf.out' + +#482.sphinx3 +sphinx3 = Process() # Update June 7, 2017: This used to be LiveProcess() +sphinx3.executable = 'sphinx_livepretend' + x86_suffix +# TEST CMDS +#sphinx3.cmd = [sphinx3.executable] + ['ctlfile', '.', 'args.an4'] +# REF CMDS +sphinx3.cmd = [sphinx3.executable] + ['ctlfile', '.', 'args.an4'] +#sphinx3.output = out_dir + 'sphinx3.out' + +#483.xalancbmk +######## NOT WORKING ########### +xalancbmk = Process() # Update June 7, 2017: This used to be LiveProcess() +xalancbmk.executable = 'xalancbmk' + x86_suffix +# TEST CMDS +######## NOT WORKING ########### +#xalancbmk.cmd = [xalancbmk.executable] + ['-v','test.xml','xalanc.xsl'] +# REF CMDS +######## NOT WORKING ########### +#xalancbmk.output = out_dir + 'xalancbmk.out' + +#998.specrand +specrand_i = Process() # Update June 7, 2017: This used to be LiveProcess() +specrand_i.executable = 'specrand' + x86_suffix +# TEST CMDS +#specrand_i.cmd = [specrand_i.executable] + ['324342', '24239'] +# REF CMDS +specrand_i.cmd = [specrand_i.executable] + ['1255432124', '234923'] +#specrand_i.output = out_dir + 'specrand_i.out' + +#999.specrand +specrand_f = Process() # Update June 7, 2017: This used to be LiveProcess() +specrand_f.executable = 'specrand' + x86_suffix +# TEST CMDS +#specrand_f.cmd = [specrand_f.executable] + ['324342', '24239'] +# REF CMDS +specrand_f.cmd = [specrand_f.executable] + ['1255432124', '234923'] +#specrand_f.output = out_dir + 'specrand_f.out' diff --git a/configs/example/spec06_config.py b/configs/example/spec06_config.py new file mode 100644 index 000000000..46781aa5a --- /dev/null +++ b/configs/example/spec06_config.py @@ -0,0 +1,406 @@ +# Copyright (c) 2012-2013 ARM Limited +# All rights reserved. +# +# The license below extends only to copyright in the software and shall +# not be construed as granting a license to any other intellectual +# property including but not limited to intellectual property relating +# to a hardware implementation of the functionality of the software +# licensed hereunder. You may use the software subject to the license +# terms below provided that you ensure that this notice is replicated +# unmodified and in its entirety in all distributions of the software, +# modified or unmodified, in source code or in binary form. +# +# Copyright (c) 2006-2008 The Regents of The University of Michigan +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Steve Reinhardt + +# Simple test script +# +# "m5 test.py" + +import optparse +import sys +import os + +import m5 +from m5.defines import buildEnv +from m5.objects import * +from m5.util import addToPath, fatal, warn + +addToPath('../') + +from ruby import Ruby + +from common import Options +from common import Simulation +from common import CacheConfig +from common import CpuConfig +from common import MemConfig +from common.Caches import * +from common.cpu2000 import * + +import spec06_benchmarks + +# Check if KVM support has been enabled, we might need to do VM +# configuration if that's the case. +have_kvm_support = 'BaseKvmCPU' in globals() +def is_kvm_cpu(cpu_class): + return have_kvm_support and cpu_class != None and \ + issubclass(cpu_class, BaseKvmCPU) + +def get_processes(options): + """Interprets provided options and returns a list of processes""" + + multiprocesses = [] + inputs = [] + outputs = [] + errouts = [] + pargs = [] + + workloads = options.cmd.split(';') + if options.input != "": + inputs = options.input.split(';') + if options.output != "": + outputs = options.output.split(';') + if options.errout != "": + errouts = options.errout.split(';') + if options.options != "": + pargs = options.options.split(';') + + idx = 0 + for wrkld in workloads: + process = Process(pid = 100 + idx) + process.executable = wrkld + process.cwd = os.getcwd() + + if options.env: + with open(options.env, 'r') as f: + process.env = [line.rstrip() for line in f] + + if len(pargs) > idx: + process.cmd = [wrkld] + pargs[idx].split() + else: + process.cmd = [wrkld] + + if len(inputs) > idx: + process.input = inputs[idx] + if len(outputs) > idx: + process.output = outputs[idx] + if len(errouts) > idx: + process.errout = errouts[idx] + + multiprocesses.append(process) + idx += 1 + + if options.smt: + assert(options.cpu_type == "DerivO3CPU") + return multiprocesses, idx + else: + return multiprocesses, 1 + + +parser = optparse.OptionParser() +Options.addCommonOptions(parser) +Options.addSEOptions(parser) + +parser.add_option("-b", "--benchmark", type="string", default="", help="The SPEC benchmark to be loaded.") +parser.add_option("--benchmark_stdout", type="string", default="", help="Absolute path for stdout redirection for the benchmark.") +parser.add_option("--benchmark_stderr", type="string", default="", help="Absolute path for stderr redirection for the benchmark.") + +if '--ruby' in sys.argv: + Ruby.define_options(parser) + +(options, args) = parser.parse_args() + +if args: + print "Error: script doesn't take any positional arguments" + sys.exit(1) + +#multiprocesses = [] +numThreads = 1 + +if options.benchmark: + print 'Selected SPEC_CPU2006 benchmark' + if options.benchmark == 'perlbench': + print '--> perlbench' + process = spec06_benchmarks.perlbench + elif options.benchmark == 'bzip2': + print '--> bzip2' + process = spec06_benchmarks.bzip2 + elif options.benchmark == 'gcc': + print '--> gcc' + process = spec06_benchmarks.gcc + elif options.benchmark == 'bwaves': + print '--> bwaves' + process = spec06_benchmarks.bwaves + elif options.benchmark == 'gamess': + print '--> gamess' + process = spec06_benchmarks.gamess + elif options.benchmark == 'mcf': + print '--> mcf' + process = spec06_benchmarks.mcf + elif options.benchmark == 'milc': + print '--> milc' + process = spec06_benchmarks.milc + elif options.benchmark == 'zeusmp': + print '--> zeusmp' + process = spec06_benchmarks.zeusmp + elif options.benchmark == 'gromacs': + print '--> gromacs' + process = spec06_benchmarks.gromacs + elif options.benchmark == 'cactusADM': + print '--> cactusADM' + process = spec06_benchmarks.cactusADM + elif options.benchmark == 'leslie3d': + print '--> leslie3d' + process = spec06_benchmarks.leslie3d + elif options.benchmark == 'namd': + print '--> namd' + process = spec06_benchmarks.namd + elif options.benchmark == 'gobmk': + print '--> gobmk' + process = spec06_benchmarks.gobmk + elif options.benchmark == 'dealII': + print '--> dealII' + process = spec06_benchmarks.dealII + elif options.benchmark == 'soplex': + print '--> soplex' + process = spec06_benchmarks.soplex + elif options.benchmark == 'povray': + print '--> povray' + process = spec06_benchmarks.povray + elif options.benchmark == 'calculix': + print '--> calculix' + process = spec06_benchmarks.calculix + elif options.benchmark == 'hmmer': + print '--> hmmer' + process = spec06_benchmarks.hmmer + elif options.benchmark == 'sjeng': + print '--> sjeng' + process = spec06_benchmarks.sjeng + elif options.benchmark == 'GemsFDTD': + print '--> GemsFDTD' + process = spec06_benchmarks.GemsFDTD + elif options.benchmark == 'libquantum': + print '--> libquantum' + process = spec06_benchmarks.libquantum + elif options.benchmark == 'h264ref': + print '--> h264ref' + process = spec06_benchmarks.h264ref + elif options.benchmark == 'tonto': + print '--> tonto' + process = spec06_benchmarks.tonto + elif options.benchmark == 'lbm': + print '--> lbm' + process = spec06_benchmarks.lbm + elif options.benchmark == 'omnetpp': + print '--> omnetpp' + process = spec06_benchmarks.omnetpp + elif options.benchmark == 'astar': + print '--> astar' + process = spec06_benchmarks.astar + elif options.benchmark == 'wrf': + print '--> wrf' + process = spec06_benchmarks.wrf + elif options.benchmark == 'sphinx3': + print '--> sphinx3' + process = spec06_benchmarks.sphinx3 + elif options.benchmark == 'xalancbmk': + print '--> xalancbmk' + process = spec06_benchmarks.xalancbmk + elif options.benchmark == 'specrand_i': + print '--> specrand_i' + process = spec06_benchmarks.specrand_i + elif options.benchmark == 'specrand_f': + print '--> specrand_f' + process = spec06_benchmarks.specrand_f + else: + print "No recognized SPEC2006 benchmark selected! Exiting." + sys.exit(1) +else: + print >> sys.stderr, "Need --benchmark switch to specify SPEC CPU2006 workload. Exiting!\n" + sys.exit(1) + +# Set process stdout/stderr +if options.benchmark_stdout: + process.output = options.benchmark_stdout + print "Process stdout file: " + process.output +if options.benchmark_stderr: + process.errout = options.benchmark_stderr + print "Process stderr file: " + process.errout + +#if options.bench: +# apps = options.bench.split("-") +# if len(apps) != options.num_cpus: +# print "number of benchmarks not equal to set num_cpus!" +# sys.exit(1) +# +# for app in apps: +# try: +# if buildEnv['TARGET_ISA'] == 'alpha': +# exec("workload = %s('alpha', 'tru64', '%s')" % ( +# app, options.spec_input)) +# elif buildEnv['TARGET_ISA'] == 'arm': +# exec("workload = %s('arm_%s', 'linux', '%s')" % ( +# app, options.arm_iset, options.spec_input)) +# else: +# exec("workload = %s(buildEnv['TARGET_ISA', 'linux', '%s')" % ( +# app, options.spec_input)) +# multiprocesses.append(workload.makeProcess()) +# except: +# print >>sys.stderr, "Unable to find workload for %s: %s" % ( +# buildEnv['TARGET_ISA'], app) +# sys.exit(1) +#elif options.cmd: +# multiprocesses, numThreads = get_processes(options) +#else: +# print >> sys.stderr, "No workload specified. Exiting!\n" +# sys.exit(1) + + +(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) +CPUClass.numThreads = numThreads + +# Check -- do not allow SMT with multiple CPUs +if options.smt and options.num_cpus > 1: + fatal("You cannot use SMT with multiple CPUs!") + +np = options.num_cpus +system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)], + mem_mode = test_mem_mode, + mem_ranges = [AddrRange(options.mem_size)], + cache_line_size = options.cacheline_size) + +if numThreads > 1: + system.multi_thread = True + +# Create a top-level voltage domain +system.voltage_domain = VoltageDomain(voltage = options.sys_voltage) + +# Create a source clock for the system and set the clock period +system.clk_domain = SrcClockDomain(clock = options.sys_clock, + voltage_domain = system.voltage_domain) + +# Create a CPU voltage domain +system.cpu_voltage_domain = VoltageDomain() + +# Create a separate clock domain for the CPUs +system.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock, + voltage_domain = + system.cpu_voltage_domain) + +# If elastic tracing is enabled, then configure the cpu and attach the elastic +# trace probe +if options.elastic_trace_en: + CpuConfig.config_etrace(CPUClass, system.cpu, options) + +# All cpus belong to a common cpu_clk_domain, therefore running at a common +# frequency. +for cpu in system.cpu: + cpu.clk_domain = system.cpu_clk_domain + +if is_kvm_cpu(CPUClass) or is_kvm_cpu(FutureClass): + if buildEnv['TARGET_ISA'] == 'x86': + system.kvm_vm = KvmVM() + for process in multiprocesses: + process.useArchPT = True + process.kvmInSE = True + else: + fatal("KvmCPU can only be used in SE mode with x86") + +# Sanity check +if options.fastmem: + if CPUClass != AtomicSimpleCPU: + fatal("Fastmem can only be used with atomic CPU!") + if (options.caches or options.l2cache): + fatal("You cannot use fastmem in combination with caches!") + +if options.simpoint_profile: + if not options.fastmem: + # Atomic CPU checked with fastmem option already + fatal("SimPoint generation should be done with atomic cpu and fastmem") + if np > 1: + fatal("SimPoint generation not supported with more than one CPUs") + +for i in xrange(np): + system.cpu[i].workload = process + print process.cmd + + #if options.smt: + # system.cpu[i].workload = multiprocesses + #elif len(multiprocesses) == 1: + # system.cpu[i].workload = multiprocesses[0] + #else: + # system.cpu[i].workload = multiprocesses[i] + + if options.fastmem: + system.cpu[i].fastmem = True + + if options.simpoint_profile: + system.cpu[i].addSimPointProbe(options.simpoint_interval) + + if options.checker: + system.cpu[i].addCheckerCpu() + + system.cpu[i].createThreads() + +if options.ruby: + Ruby.create_system(options, False, system) + assert(options.num_cpus == len(system.ruby._cpu_ports)) + + system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, + voltage_domain = system.voltage_domain) + for i in xrange(np): + ruby_port = system.ruby._cpu_ports[i] + + # Create the interrupt controller and connect its ports to Ruby + # Note that the interrupt controller is always present but only + # in x86 does it have message ports that need to be connected + system.cpu[i].createInterruptController() + + # Connect the cpu's cache ports to Ruby + system.cpu[i].icache_port = ruby_port.slave + system.cpu[i].dcache_port = ruby_port.slave + if buildEnv['TARGET_ISA'] == 'x86': + system.cpu[i].interrupts[0].pio = ruby_port.master + system.cpu[i].interrupts[0].int_master = ruby_port.slave + system.cpu[i].interrupts[0].int_slave = ruby_port.master + system.cpu[i].itb.walker.port = ruby_port.slave + system.cpu[i].dtb.walker.port = ruby_port.slave +else: + MemClass = Simulation.setMemClass(options) + system.membus = SystemXBar() + system.system_port = system.membus.slave + CacheConfig.config_cache(options, system) + MemConfig.config_mem(options, system) + +# [InvisiSpec] Configure simulation scheme +if CPUClass == DerivO3CPU: + CpuConfig.config_scheme(CPUClass, system.cpu, options) + +root = Root(full_system = False, system = system) +Simulation.run(options, root, system, FutureClass) diff --git a/configs/ruby/MESI_Two_Level.py b/configs/ruby/MESI_Two_Level.py index 52976e6bb..65d711e5e 100644 --- a/configs/ruby/MESI_Two_Level.py +++ b/configs/ruby/MESI_Two_Level.py @@ -102,7 +102,7 @@ def create_system(options, full_system, system, dma_ports, bootmem, ruby_system = ruby_system, clk_domain = clk_domain, transitions_per_cycle = options.ports, - enable_prefetch = False) + enable_prefetch = options.enable_prefetch) cpu_seq = RubySequencer(version = i, icache = l1i_cache, dcache = l1d_cache, clk_domain = clk_domain, diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py index 2ddf608fb..ed9b7208d 100644 --- a/configs/ruby/Ruby.py +++ b/configs/ruby/Ruby.py @@ -80,6 +80,9 @@ def define_options(parser): parser.add_option("--recycle-latency", type="int", default=10, help="Recycle latency for ruby controller input buffers") + parser.add_option("--enable-prefetch", action="store_true", default=False, + help="Enable Ruby HW Prefetcher") + protocol = buildEnv['PROTOCOL'] exec "import %s" % protocol eval("%s.define_options(parser)" % protocol) |