diff options
| -rw-r--r-- | src/arch/arm/tlb.cc | 2 | ||||
| -rw-r--r-- | src/mem/request.hh | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 7a79725e1..107901f99 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -474,6 +474,8 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode, bool is_priv = isPriv && !(flags & UserMode); req->setAsid(contextId.asid); + if (is_priv) + req->setFlags(Request::PRIVILEGED); DPRINTF(TLBVerbose, "CPSR is priv:%d UserMode:%d\n", isPriv, flags & UserMode); diff --git a/src/mem/request.hh b/src/mem/request.hh index f37e34dd4..a0ff50910 100644 --- a/src/mem/request.hh +++ b/src/mem/request.hh @@ -111,6 +111,8 @@ class Request static const FlagsType MMAPPED_IPR = 0x00002000; /** This request is a clear exclusive. */ static const FlagsType CLEAR_LL = 0x00004000; + /** This request is made in privileged mode. */ + static const FlagsType PRIVILEGED = 0x00008000; /** The request should not cause a memory access. */ static const FlagsType NO_ACCESS = 0x00080000; @@ -539,6 +541,7 @@ class Request bool isInstFetch() const { return _flags.isSet(INST_FETCH); } bool isPrefetch() const { return _flags.isSet(PREFETCH); } bool isLLSC() const { return _flags.isSet(LLSC); } + bool isPriv() const { return _flags.isSet(PRIVILEGED); } bool isLocked() const { return _flags.isSet(LOCKED); } bool isSwap() const { return _flags.isSet(MEM_SWAP|MEM_SWAP_COND); } bool isCondSwap() const { return _flags.isSet(MEM_SWAP_COND); } |