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-rw-r--r--src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb36
-rw-r--r--src/mem/ruby/config/cfg.rb45
-rw-r--r--src/mem/ruby/config/defaults.rb39
3 files changed, 89 insertions, 31 deletions
diff --git a/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb b/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb
index 8a202d450..83020742e 100644
--- a/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb
+++ b/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb
@@ -26,7 +26,7 @@ num_memories = 1
memory_size_mb = 1024
num_dma = 1
-protocol = "MOESI_CMP_directory"
+protocol = "MESI_CMP_directory"
# check for overrides
@@ -49,7 +49,7 @@ end
net_ports = Array.new
iface_ports = Array.new
-assert(protocol == "MOESI_CMP_directory", __FILE__+" cannot be used with protocol "+protocol);
+#assert(protocol == "MESI_CMP_directory", __FILE__+" cannot be used with protocol "+protocol);
require protocol+".rb"
@@ -65,6 +65,14 @@ num_cores.times { |n|
sequencer,
num_l2_banks)
end
+
+ if protocol == "MESI_CMP_directory"
+ net_ports << MESI_CMP_directory_L1CacheController.new("L1CacheController_"+n.to_s,
+ "L1Cache",
+ icache, dcache,
+ sequencer,
+ num_l2_banks)
+ end
}
num_l2_banks.times { |n|
cache = SetAssociativeCache.new("l2u_"+n.to_s, l2_cache_size_kb/num_l2_banks, l2_cache_latency, l2_cache_assoc, "PSEUDO_LRU")
@@ -73,6 +81,14 @@ num_l2_banks.times { |n|
"L2Cache",
cache)
end
+
+ if protocol == "MESI_CMP_directory"
+ net_ports << MESI_CMP_directory_L2CacheController.new("L2CacheController_"+n.to_s,
+ "L2Cache",
+ cache)
+ end
+
+
}
num_memories.times { |n|
directory = DirectoryMemory.new("DirectoryMemory_"+n.to_s, memory_size_mb/num_memories)
@@ -83,6 +99,14 @@ num_memories.times { |n|
directory,
memory_control)
end
+
+ if protocol == "MESI_CMP_directory"
+ net_ports << MESI_CMP_directory_DirectoryController.new("DirectoryController_"+n.to_s,
+ "Directory",
+ directory,
+ memory_control)
+ end
+
}
num_dma.times { |n|
dma_sequencer = DMASequencer.new("DMASequencer_"+n.to_s)
@@ -92,6 +116,14 @@ num_dma.times { |n|
"DMA",
dma_sequencer)
end
+
+ if protocol == "MESI_CMP_directory"
+ net_ports << MESI_CMP_directory_DMAController.new("DMAController_"+n.to_s,
+ "DMA",
+ dma_sequencer)
+ end
+
+
}
topology = CrossbarTopology.new("theTopology", net_ports)
diff --git a/src/mem/ruby/config/cfg.rb b/src/mem/ruby/config/cfg.rb
index 445bb4885..1c261544d 100644
--- a/src/mem/ruby/config/cfg.rb
+++ b/src/mem/ruby/config/cfg.rb
@@ -296,7 +296,6 @@ private
end
-#require "defaults.rb"
@@ -439,27 +438,27 @@ class SetAssociativeCache < Cache
cacti_args << 360 << 0 << 0 << 0 << 0 << 1 << 1 << 1 << 1 << 0 << 0
cacti_args << 50 << 10 << 10 << 0 << 1 << 1
- cacti_cmd = File.dirname(__FILE__) + "/cacti/cacti " + cacti_args.join(" ")
-
- IO.popen(cacti_cmd) { |pipe|
- str1 = pipe.readline
- str2 = pipe.readline
- results = str2.split(", ")
- if results.size != 61
- print "CACTI ERROR: CACTI produced unexpected output.\n"
- print "Are you using the version shipped with libruby?\n"
- raise Exception
- end
- latency_ns = results[5].to_f
- if (latency_ns == "1e+39")
- print "CACTI ERROR: CACTI was unable to realistically model the cache ",@obj_name,"\n"
- print "Either change the cache parameters or manually set the latency values\n"
- raise Exception
- end
- clk_period_ns = 1e9 * (1.0 / (RubySystem.freq_mhz * 1e6))
- latency_cycles = (latency_ns / clk_period_ns).ceil
- @latency = latency_cycles
- }
+# cacti_cmd = File.dirname(__FILE__) + "/cacti/cacti " + cacti_args.join(" ")
+
+# IO.popen(cacti_cmd) { |pipe|
+# str1 = pipe.readline
+# str2 = pipe.readline
+# results = str2.split(", ")
+# if results.size != 61
+# print "CACTI ERROR: CACTI produced unexpected output.\n"
+# print "Are you using the version shipped with libruby?\n"
+# raise Exception
+# end
+# latency_ns = results[5].to_f
+# if (latency_ns == "1e+39")
+# print "CACTI ERROR: CACTI was unable to realistically model the cache ",@obj_name,"\n"
+# print "Either change the cache parameters or manually set the latency values\n"
+# raise Exception
+# end
+# clk_period_ns = 1e9 * (1.0 / (RubySystem.freq_mhz * 1e6))
+# latency_cycles = (latency_ns / clk_period_ns).ceil
+# @latency = latency_cycles
+# }
elsif @latency.is_a?(Float)
clk_period_ns = 1e9 * (1.0 / (RubySystem.freq_mhz * 1e6))
latency_cycles = (@latency / clk_period_ns).ceil
@@ -540,7 +539,6 @@ class MemoryControl < LibRubyObject
end
-
class Sequencer < IfacePort
def cppClassName()
@@ -759,4 +757,5 @@ class GarnetFlexiblePipeline < GarnetNetwork
end
end
+#added by SS
require "defaults.rb"
diff --git a/src/mem/ruby/config/defaults.rb b/src/mem/ruby/config/defaults.rb
index 384abd119..60f32ca14 100644
--- a/src/mem/ruby/config/defaults.rb
+++ b/src/mem/ruby/config/defaults.rb
@@ -9,7 +9,7 @@ class NetPort < LibRubyObject
# buffer_size limits the size of all other buffers connecting to
# SLICC Controllers. When 0, infinite buffering is used.
- default_param :buffer_size, Integer, 32
+ default_param :buffer_size, Integer, 0
# added by SS for TBE
default_param :number_of_TBEs, Integer, 256
@@ -36,7 +36,7 @@ class Debug < LibRubyObject
# 1. change protocol_trace = true
# 2. enable debug in the Ruby Makefile
# 3. set start_time = 1
- default_param :protocol_trace, Boolean, false
+ default_param :protocol_trace, Boolean, true
# a string for filtering debugging output (for all g_debug vars see Debug.h)
default_param :filter_string, String, "none"
@@ -46,9 +46,9 @@ class Debug < LibRubyObject
# filters debugging messages based on a ruby time
default_param :start_time, Integer, 1
-
+
# sends debugging messages to a output filename
- default_param :output_filename, String, "none"
+ default_param :output_filename, String, "debug_ss"
end
class Topology < LibRubyObject
@@ -71,11 +71,11 @@ end
class Network < LibRubyObject
default_param :endpoint_bandwidth, Integer, 10000
default_param :adaptive_routing, Boolean, true
- default_param :number_of_virtual_networks, Integer, 6
+ default_param :number_of_virtual_networks, Integer, 10
default_param :fan_out_degree, Integer, 4
# default buffer size. Setting to 0 indicates infinite buffering
- default_param :buffer_size, Integer, 3
+ default_param :buffer_size, Integer, 0
# local memory latency ?? NetworkLinkLatency
default_param :link_latency, Integer, 1
@@ -204,4 +204,31 @@ class RubySystem
default_param :profiler, Profiler, Profiler.new("profiler0")
end
+#added by SS
+
+class MESI_CMP_directory_L2CacheController < CacheController
+ default_param :l2_request_latency, Integer, 2
+ default_param :l2_response_latency, Integer, 2
+ default_param :to_L1_latency, Integer, 1
+
+#if 0 then automatically calculated
+ default_param :lowest_bit, Integer, 0
+ default_param :highest_bit, Integer, 0
+end
+
+class MESI_CMP_directory_L1CacheController < L1CacheController
+ default_param :l1_request_latency, Integer, 2
+ default_param :l1_response_latency, Integer, 2
+ default_param :to_L2_latency, Integer, 1
+end
+
+
+class MESI_CMP_directory_DirectoryController < DirectoryController
+ default_param :to_mem_ctrl_latency, Integer, 1
+ default_param :directory_latency, Integer, 6
+end
+
+class MESI_CMP_directory_DMAController < DMAController
+ default_param :request_latency, Integer, 6
+end