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-rw-r--r--src/arch/arm/interrupts.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh
index 77287e6dd..8d0cb49ea 100644
--- a/src/arch/arm/interrupts.hh
+++ b/src/arch/arm/interrupts.hh
@@ -142,7 +142,7 @@ class Interrupts : public SimObject
CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
- bool isHypMode = cpsr.mode == MODE_HYP;
+ bool isHypMode = currEL(tc) == EL2;
bool isSecure = inSecureState(tc);
bool allowVIrq = !cpsr.i && hcr.imo && !isSecure && !isHypMode;
bool allowVFiq = !cpsr.f && hcr.fmo && !isSecure && !isHypMode;
@@ -232,7 +232,7 @@ class Interrupts : public SimObject
// Calculate a few temp vars so we can work out if there's a pending
// virtual interrupt, and if its allowed to happen
// ARM ARM Issue C section B1.9.9, B1.9.11, and B1.9.13
- bool isHypMode = cpsr.mode == MODE_HYP;
+ bool isHypMode = currEL(tc) == EL2;
bool isSecure = inSecureState(tc);
bool allowVIrq = !cpsr.i && hcr.imo && !isSecure && !isHypMode;
bool allowVFiq = !cpsr.f && hcr.fmo && !isSecure && !isHypMode;