summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--src/cpu/exetrace.cc95
-rw-r--r--util/statetrace/arch/tracechild_sparc.cc70
-rw-r--r--util/statetrace/arch/tracechild_sparc.hh8
3 files changed, 89 insertions, 84 deletions
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index 8b1e60aea..9d85311bb 100644
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -60,61 +60,66 @@ Trace::InstRecord::dump(ostream &outs)
if (flags[PRINT_REG_DELTA])
{
#if THE_ISA == SPARC_ISA
- static uint64_t regs[32] = {
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0};
- static uint64_t ccr = 0;
- static uint64_t y = 0;
- static uint64_t floats[32];
- uint64_t newVal;
- static const char * prefixes[4] = {"G", "O", "L", "I"};
-
- char buf[256];
- sprintf(buf, "PC = 0x%016llx", thread->readNextPC());
- outs << buf;
- sprintf(buf, " NPC = 0x%016llx", thread->readNextNPC());
- outs << buf;
- newVal = thread->readMiscReg(SparcISA::MISCREG_CCR);
- if(newVal != ccr)
+ //Don't print what happens for each micro-op, just print out
+ //once at the last op, and for regular instructions.
+ if(!staticInst->isMicroOp() || staticInst->isLastMicroOp())
{
- sprintf(buf, " CCR = 0x%016llx", newVal);
+ static uint64_t regs[32] = {
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0};
+ static uint64_t ccr = 0;
+ static uint64_t y = 0;
+ static uint64_t floats[32];
+ uint64_t newVal;
+ static const char * prefixes[4] = {"G", "O", "L", "I"};
+
+ char buf[256];
+ sprintf(buf, "PC = 0x%016llx", thread->readNextPC());
outs << buf;
- ccr = newVal;
- }
- newVal = thread->readMiscReg(SparcISA::MISCREG_Y);
- if(newVal != y)
- {
- sprintf(buf, " Y = 0x%016llx", newVal);
+ sprintf(buf, " NPC = 0x%016llx", thread->readNextNPC());
outs << buf;
- y = newVal;
- }
- for(int y = 0; y < 4; y++)
- {
- for(int x = 0; x < 8; x++)
+ newVal = thread->readMiscReg(SparcISA::MISCREG_CCR);
+ if(newVal != ccr)
+ {
+ sprintf(buf, " CCR = 0x%016llx", newVal);
+ outs << buf;
+ ccr = newVal;
+ }
+ newVal = thread->readMiscReg(SparcISA::MISCREG_Y);
+ if(newVal != y)
+ {
+ sprintf(buf, " Y = 0x%016llx", newVal);
+ outs << buf;
+ y = newVal;
+ }
+ for(int y = 0; y < 4; y++)
{
- int index = x + 8 * y;
- newVal = thread->readIntReg(index);
- if(regs[index] != newVal)
+ for(int x = 0; x < 8; x++)
{
- sprintf(buf, " %s%d = 0x%016llx", prefixes[y], x, newVal);
- outs << buf;
- regs[index] = newVal;
+ int index = x + 8 * y;
+ newVal = thread->readIntReg(index);
+ if(regs[index] != newVal)
+ {
+ sprintf(buf, " %s%d = 0x%016llx", prefixes[y], x, newVal);
+ outs << buf;
+ regs[index] = newVal;
+ }
}
}
- }
- for(int y = 0; y < 32; y++)
- {
- newVal = thread->readFloatRegBits(2 * y, 64);
- if(floats[y] != newVal)
+ for(int y = 0; y < 32; y++)
{
- sprintf(buf, " F%d = 0x%016llx", y, newVal);
- outs << buf;
- floats[y] = newVal;
+ newVal = thread->readFloatRegBits(2 * y, 64);
+ if(floats[y] != newVal)
+ {
+ sprintf(buf, " F%d = 0x%016llx", 2 * y, newVal);
+ outs << buf;
+ floats[y] = newVal;
+ }
}
+ outs << endl;
}
- outs << endl;
#endif
}
else if (flags[INTEL_FORMAT]) {
diff --git a/util/statetrace/arch/tracechild_sparc.cc b/util/statetrace/arch/tracechild_sparc.cc
index 378de0865..1dc62412a 100644
--- a/util/statetrace/arch/tracechild_sparc.cc
+++ b/util/statetrace/arch/tracechild_sparc.cc
@@ -47,10 +47,10 @@ string SparcTraceChild::regNames[numregs] = {
//Input registers
"i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7",
//Floating point
- "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
- "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
- "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
- "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
+ "f0", "f2", "f4", "f6", "f8", "f10", "f12", "f14",
+ "f16", "f18", "f20", "f22", "f24", "f26", "f28", "f30",
+ "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
+ "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
//Miscelaneous
"fsr", "fprs", "pc", "npc", "y", "cwp", "pstate", "asi", "ccr"};
@@ -98,37 +98,37 @@ int64_t getRegs(regs & myregs, fpu & myfpu,
case SparcTraceChild::I7: return inputs[7];
//Floating point
case SparcTraceChild::F0: return myfpu.f_fpstatus.fpu_fr[0];
- case SparcTraceChild::F1: return myfpu.f_fpstatus.fpu_fr[1];
- case SparcTraceChild::F2: return myfpu.f_fpstatus.fpu_fr[2];
- case SparcTraceChild::F3: return myfpu.f_fpstatus.fpu_fr[3];
- case SparcTraceChild::F4: return myfpu.f_fpstatus.fpu_fr[4];
- case SparcTraceChild::F5: return myfpu.f_fpstatus.fpu_fr[5];
- case SparcTraceChild::F6: return myfpu.f_fpstatus.fpu_fr[6];
- case SparcTraceChild::F7: return myfpu.f_fpstatus.fpu_fr[7];
- case SparcTraceChild::F8: return myfpu.f_fpstatus.fpu_fr[8];
- case SparcTraceChild::F9: return myfpu.f_fpstatus.fpu_fr[9];
- case SparcTraceChild::F10: return myfpu.f_fpstatus.fpu_fr[10];
- case SparcTraceChild::F11: return myfpu.f_fpstatus.fpu_fr[11];
- case SparcTraceChild::F12: return myfpu.f_fpstatus.fpu_fr[12];
- case SparcTraceChild::F13: return myfpu.f_fpstatus.fpu_fr[13];
- case SparcTraceChild::F14: return myfpu.f_fpstatus.fpu_fr[14];
- case SparcTraceChild::F15: return myfpu.f_fpstatus.fpu_fr[15];
- case SparcTraceChild::F16: return myfpu.f_fpstatus.fpu_fr[16];
- case SparcTraceChild::F17: return myfpu.f_fpstatus.fpu_fr[17];
- case SparcTraceChild::F18: return myfpu.f_fpstatus.fpu_fr[18];
- case SparcTraceChild::F19: return myfpu.f_fpstatus.fpu_fr[19];
- case SparcTraceChild::F20: return myfpu.f_fpstatus.fpu_fr[20];
- case SparcTraceChild::F21: return myfpu.f_fpstatus.fpu_fr[21];
- case SparcTraceChild::F22: return myfpu.f_fpstatus.fpu_fr[22];
- case SparcTraceChild::F23: return myfpu.f_fpstatus.fpu_fr[23];
- case SparcTraceChild::F24: return myfpu.f_fpstatus.fpu_fr[24];
- case SparcTraceChild::F25: return myfpu.f_fpstatus.fpu_fr[25];
- case SparcTraceChild::F26: return myfpu.f_fpstatus.fpu_fr[26];
- case SparcTraceChild::F27: return myfpu.f_fpstatus.fpu_fr[27];
- case SparcTraceChild::F28: return myfpu.f_fpstatus.fpu_fr[28];
- case SparcTraceChild::F29: return myfpu.f_fpstatus.fpu_fr[29];
- case SparcTraceChild::F30: return myfpu.f_fpstatus.fpu_fr[30];
- case SparcTraceChild::F31: return myfpu.f_fpstatus.fpu_fr[31];
+ case SparcTraceChild::F2: return myfpu.f_fpstatus.fpu_fr[1];
+ case SparcTraceChild::F4: return myfpu.f_fpstatus.fpu_fr[2];
+ case SparcTraceChild::F6: return myfpu.f_fpstatus.fpu_fr[3];
+ case SparcTraceChild::F8: return myfpu.f_fpstatus.fpu_fr[4];
+ case SparcTraceChild::F10: return myfpu.f_fpstatus.fpu_fr[5];
+ case SparcTraceChild::F12: return myfpu.f_fpstatus.fpu_fr[6];
+ case SparcTraceChild::F14: return myfpu.f_fpstatus.fpu_fr[7];
+ case SparcTraceChild::F16: return myfpu.f_fpstatus.fpu_fr[8];
+ case SparcTraceChild::F18: return myfpu.f_fpstatus.fpu_fr[9];
+ case SparcTraceChild::F20: return myfpu.f_fpstatus.fpu_fr[10];
+ case SparcTraceChild::F22: return myfpu.f_fpstatus.fpu_fr[11];
+ case SparcTraceChild::F24: return myfpu.f_fpstatus.fpu_fr[12];
+ case SparcTraceChild::F26: return myfpu.f_fpstatus.fpu_fr[13];
+ case SparcTraceChild::F28: return myfpu.f_fpstatus.fpu_fr[14];
+ case SparcTraceChild::F30: return myfpu.f_fpstatus.fpu_fr[15];
+ case SparcTraceChild::F32: return myfpu.f_fpstatus.fpu_fr[16];
+ case SparcTraceChild::F34: return myfpu.f_fpstatus.fpu_fr[17];
+ case SparcTraceChild::F36: return myfpu.f_fpstatus.fpu_fr[18];
+ case SparcTraceChild::F38: return myfpu.f_fpstatus.fpu_fr[19];
+ case SparcTraceChild::F40: return myfpu.f_fpstatus.fpu_fr[20];
+ case SparcTraceChild::F42: return myfpu.f_fpstatus.fpu_fr[21];
+ case SparcTraceChild::F44: return myfpu.f_fpstatus.fpu_fr[22];
+ case SparcTraceChild::F46: return myfpu.f_fpstatus.fpu_fr[23];
+ case SparcTraceChild::F48: return myfpu.f_fpstatus.fpu_fr[24];
+ case SparcTraceChild::F50: return myfpu.f_fpstatus.fpu_fr[25];
+ case SparcTraceChild::F52: return myfpu.f_fpstatus.fpu_fr[26];
+ case SparcTraceChild::F54: return myfpu.f_fpstatus.fpu_fr[27];
+ case SparcTraceChild::F56: return myfpu.f_fpstatus.fpu_fr[28];
+ case SparcTraceChild::F58: return myfpu.f_fpstatus.fpu_fr[29];
+ case SparcTraceChild::F60: return myfpu.f_fpstatus.fpu_fr[30];
+ case SparcTraceChild::F62: return myfpu.f_fpstatus.fpu_fr[31];
//Miscelaneous
case SparcTraceChild::FSR: return myfpu.f_fpstatus.Fpu_fsr;
case SparcTraceChild::FPRS: return myregs.r_fprs;
diff --git a/util/statetrace/arch/tracechild_sparc.hh b/util/statetrace/arch/tracechild_sparc.hh
index d177d5941..80770211a 100644
--- a/util/statetrace/arch/tracechild_sparc.hh
+++ b/util/statetrace/arch/tracechild_sparc.hh
@@ -57,10 +57,10 @@ public:
//Input registers
I0, I1, I2, I3, I4, I5, I6, I7,
//Floating point
- F0, F1, F2, F3, F4, F5, F6, F7,
- F8, F9, F10, F11, F12, F13, F14, F15,
- F16, F17, F18, F19, F20, F21, F22, F23,
- F24, F25, F26, F27, F28, F29, F30, F31,
+ F0, F2, F4, F6, F8, F10, F12, F14,
+ F16, F18, F20, F22, F24, F26, F28, F30,
+ F32, F34, F36, F38, F40, F42, F44, F46,
+ F48, F50, F52, F54, F56, F58, F60, F62,
//Miscelaneous
FSR, FPRS, PC, NPC, Y, CWP, PSTATE, ASI, CCR,
numregs
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 08:52:42 +0000