diff options
| -rw-r--r-- | src/cpu/o3/iew.hh | 2 | ||||
| -rw-r--r-- | src/cpu/o3/iew_impl.hh | 4 | ||||
| -rw-r--r-- | src/cpu/o3/lsq_unit.hh | 7 |
3 files changed, 10 insertions, 3 deletions
diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh index 8ebbfb2e6..113d0756e 100644 --- a/src/cpu/o3/iew.hh +++ b/src/cpu/o3/iew.hh @@ -228,7 +228,7 @@ class DefaultIEW { if (++wbOutstanding == wbMax) ableToIssue = false; - DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding); + DPRINTF(IEW, "wbOutstanding: %i [sn:%lli]\n", wbOutstanding, sn); assert(wbOutstanding <= wbMax); #ifdef DEBUG wbList.insert(sn); diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index 3bdf1f28d..00a7ef0d9 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -1221,7 +1221,9 @@ DefaultIEW<Impl>::executeInsts() // Check if the instruction is squashed; if so then skip it if (inst->isSquashed()) { - DPRINTF(IEW, "Execute: Instruction was squashed.\n"); + DPRINTF(IEW, "Execute: Instruction was squashed. PC: %s, [tid:%i]" + " [sn:%i]\n", inst->pcState(), inst->threadNumber, + inst->seqNum); // Consider this instruction executed so that commit can go // ahead and retire the instruction. diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index be9c91a23..8e311d275 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -804,7 +804,12 @@ LSQUnit<Impl>::read(Request *req, Request *sreqLow, Request *sreqHigh, ++lsqCacheBlocked; - iewStage->decrWb(load_inst->seqNum); + // If the first part of a split access succeeds, then let the LSQ + // handle the decrWb when completeDataAccess is called upon return + // of the requested first part of data + if (!completedFirst) + iewStage->decrWb(load_inst->seqNum); + // There's an older load that's already going to squash. if (isLoadBlocked && blockedLoadSeqNum < load_inst->seqNum) return NoFault; |