summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/arch/alpha/isa_traits.hh4
-rw-r--r--src/arch/arm/isa_traits.hh4
-rw-r--r--src/arch/mips/isa_traits.hh4
-rw-r--r--src/arch/mips/system.cc2
-rw-r--r--src/arch/power/isa_traits.hh4
-rw-r--r--src/arch/riscv/isa_traits.hh4
-rw-r--r--src/arch/riscv/system.cc2
-rw-r--r--src/arch/sparc/isa_traits.hh6
-rw-r--r--src/arch/sparc/system.cc2
-rw-r--r--src/arch/x86/isa_traits.hh6
-rw-r--r--src/arch/x86/linux/system.cc1
-rw-r--r--src/arch/x86/system.cc1
-rw-r--r--src/sim/byteswap.hh33
13 files changed, 8 insertions, 65 deletions
diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index 61688b5c8..22fc0c454 100644
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -32,8 +32,6 @@
#ifndef __ARCH_ALPHA_ISA_TRAITS_HH__
#define __ARCH_ALPHA_ISA_TRAITS_HH__
-namespace LittleEndianGuest {}
-
#include "arch/alpha/ipr.hh"
#include "arch/alpha/types.hh"
#include "base/types.hh"
@@ -41,7 +39,7 @@ namespace LittleEndianGuest {}
namespace AlphaISA {
-using namespace LittleEndianGuest;
+const ByteOrder GuestByteOrder = LittleEndianByteOrder;
StaticInstPtr decodeInst(ExtMachInst);
diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh
index 5763e7747..3427837d7 100644
--- a/src/arch/arm/isa_traits.hh
+++ b/src/arch/arm/isa_traits.hh
@@ -49,11 +49,9 @@
#include "base/types.hh"
#include "cpu/static_inst_fwd.hh"
-namespace LittleEndianGuest {}
-
namespace ArmISA
{
- using namespace LittleEndianGuest;
+ const ByteOrder GuestByteOrder = LittleEndianByteOrder;
StaticInstPtr decodeInst(ExtMachInst);
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index 6e08c7e85..8dd7054ba 100644
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -38,12 +38,10 @@
#include "base/types.hh"
#include "cpu/static_inst_fwd.hh"
-namespace LittleEndianGuest {}
-
namespace MipsISA
{
-using namespace LittleEndianGuest;
+const ByteOrder GuestByteOrder = LittleEndianByteOrder;
StaticInstPtr decodeInst(ExtMachInst);
diff --git a/src/arch/mips/system.cc b/src/arch/mips/system.cc
index 9967aa82c..3d2be34c8 100644
--- a/src/arch/mips/system.cc
+++ b/src/arch/mips/system.cc
@@ -41,8 +41,6 @@
#include "params/MipsSystem.hh"
#include "sim/byteswap.hh"
-using namespace LittleEndianGuest;
-
MipsSystem::MipsSystem(Params *p) : System(p)
{
}
diff --git a/src/arch/power/isa_traits.hh b/src/arch/power/isa_traits.hh
index 9afe6803a..020913397 100644
--- a/src/arch/power/isa_traits.hh
+++ b/src/arch/power/isa_traits.hh
@@ -39,12 +39,10 @@
#include "base/types.hh"
#include "cpu/static_inst_fwd.hh"
-namespace BigEndianGuest {}
-
namespace PowerISA
{
-using namespace BigEndianGuest;
+const ByteOrder GuestByteOrder = BigEndianByteOrder;
StaticInstPtr decodeInst(ExtMachInst);
diff --git a/src/arch/riscv/isa_traits.hh b/src/arch/riscv/isa_traits.hh
index abafad2e2..f69e71994 100644
--- a/src/arch/riscv/isa_traits.hh
+++ b/src/arch/riscv/isa_traits.hh
@@ -50,12 +50,10 @@
#include "base/types.hh"
#include "cpu/static_inst_fwd.hh"
-namespace LittleEndianGuest {}
-
namespace RiscvISA
{
-using namespace LittleEndianGuest;
+const ByteOrder GuestByteOrder = LittleEndianByteOrder;
const Addr PageShift = 12;
const Addr PageBytes = ULL(1) << PageShift;
diff --git a/src/arch/riscv/system.cc b/src/arch/riscv/system.cc
index 88d6251cc..2017eed98 100644
--- a/src/arch/riscv/system.cc
+++ b/src/arch/riscv/system.cc
@@ -42,8 +42,6 @@
#include "params/RiscvSystem.hh"
#include "sim/byteswap.hh"
-using namespace LittleEndianGuest;
-
RiscvSystem::RiscvSystem(Params *p)
: System(p),
_isBareMetal(p->bare_metal),
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index f42cdb9f5..c942a6edc 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -37,12 +37,10 @@
#include "base/types.hh"
#include "cpu/static_inst_fwd.hh"
-namespace BigEndianGuest {}
-
namespace SparcISA
{
-// This makes sure the big endian versions of certain functions are used.
-using namespace BigEndianGuest;
+
+const ByteOrder GuestByteOrder = BigEndianByteOrder;
const Addr PageShift = 13;
const Addr PageBytes = ULL(1) << PageShift;
diff --git a/src/arch/sparc/system.cc b/src/arch/sparc/system.cc
index 2d79ab4c3..1a809beba 100644
--- a/src/arch/sparc/system.cc
+++ b/src/arch/sparc/system.cc
@@ -38,8 +38,6 @@
#include "params/SparcSystem.hh"
#include "sim/byteswap.hh"
-using namespace BigEndianGuest;
-
namespace
{
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 158e2f9e4..3dbacd056 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -45,13 +45,9 @@
#include "base/compiler.hh"
#include "base/types.hh"
-namespace LittleEndianGuest {}
-
namespace X86ISA
{
- //This makes sure the little endian version of certain functions
- //are used.
- using namespace LittleEndianGuest;
+ const ByteOrder GuestByteOrder = LittleEndianByteOrder;
const Addr PageShift = 12;
const Addr PageBytes = ULL(1) << PageShift;
diff --git a/src/arch/x86/linux/system.cc b/src/arch/x86/linux/system.cc
index b4cd70e30..0aa94a225 100644
--- a/src/arch/x86/linux/system.cc
+++ b/src/arch/x86/linux/system.cc
@@ -48,7 +48,6 @@
#include "params/LinuxX86System.hh"
#include "sim/byteswap.hh"
-using namespace LittleEndianGuest;
using namespace X86ISA;
LinuxX86System::LinuxX86System(Params *p)
diff --git a/src/arch/x86/system.cc b/src/arch/x86/system.cc
index 704a37aba..096f10f5e 100644
--- a/src/arch/x86/system.cc
+++ b/src/arch/x86/system.cc
@@ -48,7 +48,6 @@
#include "cpu/thread_context.hh"
#include "params/X86System.hh"
-using namespace LittleEndianGuest;
using namespace X86ISA;
X86System::X86System(Params *p) :
diff --git a/src/sim/byteswap.hh b/src/sim/byteswap.hh
index 0b41c6779..6745e0060 100644
--- a/src/sim/byteswap.hh
+++ b/src/sim/byteswap.hh
@@ -169,37 +169,4 @@ inline T gtoh(T value, ByteOrder guest_byte_order)
betoh(value) : letoh(value);
}
-namespace BigEndianGuest
-{
- const ByteOrder GuestByteOrder = BigEndianByteOrder;
- template <typename T>
- inline T gtole(T value) {return betole(value);}
- template <typename T>
- inline T letog(T value) {return letobe(value);}
- template <typename T>
- inline T gtobe(T value) {return value;}
- template <typename T>
- inline T betog(T value) {return value;}
- template <typename T>
- inline T htog(T value) {return htobe(value);}
- template <typename T>
- inline T gtoh(T value) {return betoh(value);}
-}
-
-namespace LittleEndianGuest
-{
- const ByteOrder GuestByteOrder = LittleEndianByteOrder;
- template <typename T>
- inline T gtole(T value) {return value;}
- template <typename T>
- inline T letog(T value) {return value;}
- template <typename T>
- inline T gtobe(T value) {return letobe(value);}
- template <typename T>
- inline T betog(T value) {return betole(value);}
- template <typename T>
- inline T htog(T value) {return htole(value);}
- template <typename T>
- inline T gtoh(T value) {return letoh(value);}
-}
#endif // __SIM_BYTE_SWAP_HH__