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-rw-r--r--configs/example/memtest-ruby.py24
-rw-r--r--configs/example/ruby_direct_test.py (renamed from configs/example/determ_test.py)6
-rw-r--r--configs/example/rubytest.py2
-rw-r--r--configs/ruby/MOESI_hammer.py5
-rw-r--r--src/cpu/testers/directedtest/DirectedGenerator.cc (renamed from src/cpu/directedtest/DirectedGenerator.cc)2
-rw-r--r--src/cpu/testers/directedtest/DirectedGenerator.hh (renamed from src/cpu/directedtest/DirectedGenerator.hh)4
-rw-r--r--src/cpu/testers/directedtest/InvalidateGenerator.cc (renamed from src/cpu/directedtest/InvalidateGenerator.cc)6
-rw-r--r--src/cpu/testers/directedtest/InvalidateGenerator.hh (renamed from src/cpu/directedtest/InvalidateGenerator.hh)4
-rw-r--r--src/cpu/testers/directedtest/RubyDirectedTester.cc (renamed from src/cpu/directedtest/RubyDirectedTester.cc)4
-rw-r--r--src/cpu/testers/directedtest/RubyDirectedTester.hh (renamed from src/cpu/directedtest/RubyDirectedTester.hh)0
-rw-r--r--src/cpu/testers/directedtest/RubyDirectedTester.py (renamed from src/cpu/directedtest/RubyDirectedTester.py)0
-rw-r--r--src/cpu/testers/directedtest/SConscript (renamed from src/cpu/directedtest/SConscript)0
-rw-r--r--src/cpu/testers/directedtest/SeriesRequestGenerator.cc (renamed from src/cpu/directedtest/SeriesRequestGenerator.cc)6
-rw-r--r--src/cpu/testers/directedtest/SeriesRequestGenerator.hh (renamed from src/cpu/directedtest/SeriesRequestGenerator.hh)4
-rw-r--r--src/cpu/testers/memtest/MemTest.py (renamed from src/cpu/memtest/MemTest.py)0
-rw-r--r--src/cpu/testers/memtest/SConscript (renamed from src/cpu/memtest/SConscript)0
-rw-r--r--src/cpu/testers/memtest/memtest.cc (renamed from src/cpu/memtest/memtest.cc)2
-rw-r--r--src/cpu/testers/memtest/memtest.hh (renamed from src/cpu/memtest/memtest.hh)0
-rw-r--r--src/cpu/testers/rubytest/Check.cc (renamed from src/cpu/rubytest/Check.cc)2
-rw-r--r--src/cpu/testers/rubytest/Check.hh (renamed from src/cpu/rubytest/Check.hh)2
-rw-r--r--src/cpu/testers/rubytest/CheckTable.cc (renamed from src/cpu/rubytest/CheckTable.cc)6
-rw-r--r--src/cpu/testers/rubytest/CheckTable.hh (renamed from src/cpu/rubytest/CheckTable.hh)0
-rw-r--r--src/cpu/testers/rubytest/RubyTester.cc (renamed from src/cpu/rubytest/RubyTester.cc)4
-rw-r--r--src/cpu/testers/rubytest/RubyTester.hh (renamed from src/cpu/rubytest/RubyTester.hh)2
-rw-r--r--src/cpu/testers/rubytest/RubyTester.py (renamed from src/cpu/rubytest/RubyTester.py)0
-rw-r--r--src/cpu/testers/rubytest/SConscript (renamed from src/cpu/rubytest/SConscript)0
-rw-r--r--src/mem/ruby/system/RubyPort.cc2
-rw-r--r--src/mem/ruby/system/Sequencer.cc2
28 files changed, 46 insertions, 43 deletions
diff --git a/configs/example/memtest-ruby.py b/configs/example/memtest-ruby.py
index d2e9c137e..e32e0c114 100644
--- a/configs/example/memtest-ruby.py
+++ b/configs/example/memtest-ruby.py
@@ -104,17 +104,21 @@ system = System(cpu = cpus,
funcmem = PhysicalMemory(),
physmem = PhysicalMemory())
-system.dmas = [ MemTest(atomic = False, \
- max_loads = options.maxloads, \
- issue_dmas = True, \
- percent_functional = 0, \
- percent_uncacheable = 0, \
- progress_interval = options.progress) \
- for i in xrange(options.num_dmas) ]
+if options.num_dmas > 0:
+ dmas = [ MemTest(atomic = False, \
+ max_loads = options.maxloads, \
+ issue_dmas = True, \
+ percent_functional = 0, \
+ percent_uncacheable = 0, \
+ progress_interval = options.progress) \
+ for i in xrange(options.num_dmas) ]
+ system.dma_devices = dmas
+else:
+ dmas = []
system.ruby = Ruby.create_system(options, \
- system.physmem, \
- dma_devices = system.dmas)
+ system, \
+ dma_devices = dmas)
#
# The tester is most effective when randomization is turned on and
@@ -131,7 +135,7 @@ for (i, cpu) in enumerate(cpus):
cpu.test = system.ruby.cpu_ruby_ports[i].port
cpu.functional = system.funcmem.port
-for (i, dma) in enumerate(system.dmas):
+for (i, dma) in enumerate(dmas):
#
# Tie the dma memtester ports to the correct functional port
# Note that the test port has already been connected to the dma_sequencer
diff --git a/configs/example/determ_test.py b/configs/example/ruby_direct_test.py
index 77712ffd9..e744c35bd 100644
--- a/configs/example/determ_test.py
+++ b/configs/example/ruby_direct_test.py
@@ -69,7 +69,7 @@ if args:
sys.exit(1)
#
-# Select the directed generator
+# Select the direct test generator
#
if options.test_type == "SeriesGetx":
generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
@@ -80,7 +80,7 @@ elif options.test_type == "SeriesGets":
elif options.test_type == "Invalidate":
generator = InvalidateGenerator(num_cpus = options.num_cpus)
else:
- print "Error: unknown directed generator"
+ print "Error: unknown direct test generator"
sys.exit(1)
#
@@ -95,7 +95,7 @@ system = System(physmem = PhysicalMemory())
#
system.tester = RubyDirectedTester(requests_to_complete = \
options.requests,
- generator = generator)
+ generator = generator)
system.ruby = Ruby.create_system(options, system)
diff --git a/configs/example/rubytest.py b/configs/example/rubytest.py
index a4daf6b82..ddd6a53af 100644
--- a/configs/example/rubytest.py
+++ b/configs/example/rubytest.py
@@ -90,7 +90,7 @@ tester = RubyTester(checks_to_complete = options.checks,
# actually used by the rubytester, but is included to support the
# M5 memory size == Ruby memory size checks
#
-system = System(physmem = PhysicalMemory())
+system = System(tester = tester, physmem = PhysicalMemory())
system.ruby = Ruby.create_system(options, system)
diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py
index 3cd33f981..d1c1cc2b0 100644
--- a/configs/ruby/MOESI_hammer.py
+++ b/configs/ruby/MOESI_hammer.py
@@ -186,10 +186,9 @@ def create_system(options, system, piobus, dma_devices):
exec("system.dma_cntrl%d = dma_cntrl" % i)
if dma_device.type == 'MemTest':
- system.dma_cntrl.dma_sequencer.port = dma_device.test
+ exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i)
else:
- system.dma_cntrl.dma_sequencer.port = dma_device.dma
- dma_cntrl.dma_sequencer.port = dma_device.dma
+ exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i)
dma_cntrl_nodes.append(dma_cntrl)
if options.recycle_latency:
diff --git a/src/cpu/directedtest/DirectedGenerator.cc b/src/cpu/testers/directedtest/DirectedGenerator.cc
index 6361cbf68..68ea55449 100644
--- a/src/cpu/directedtest/DirectedGenerator.cc
+++ b/src/cpu/testers/directedtest/DirectedGenerator.cc
@@ -27,7 +27,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "cpu/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/DirectedGenerator.hh"
DirectedGenerator::DirectedGenerator(const Params *p)
: SimObject(p)
diff --git a/src/cpu/directedtest/DirectedGenerator.hh b/src/cpu/testers/directedtest/DirectedGenerator.hh
index baef09ea0..904dcf399 100644
--- a/src/cpu/directedtest/DirectedGenerator.hh
+++ b/src/cpu/testers/directedtest/DirectedGenerator.hh
@@ -29,8 +29,8 @@
#ifndef __CPU_DIRECTEDTEST_DIRECTEDGENERATOR_HH__
#define __CPU_DIRECTEDTEST_DIRECTEDGENERATOR_HH__
-#include "cpu/directedtest/DirectedGenerator.hh"
-#include "cpu/directedtest/RubyDirectedTester.hh"
+#include "cpu/testers/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/RubyDirectedTester.hh"
#include "params/DirectedGenerator.hh"
#include "sim/sim_object.hh"
diff --git a/src/cpu/directedtest/InvalidateGenerator.cc b/src/cpu/testers/directedtest/InvalidateGenerator.cc
index 5a0a3cc6c..724702d61 100644
--- a/src/cpu/directedtest/InvalidateGenerator.cc
+++ b/src/cpu/testers/directedtest/InvalidateGenerator.cc
@@ -27,9 +27,9 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "cpu/directedtest/RubyDirectedTester.hh"
-#include "cpu/directedtest/DirectedGenerator.hh"
-#include "cpu/directedtest/InvalidateGenerator.hh"
+#include "cpu/testers/directedtest/RubyDirectedTester.hh"
+#include "cpu/testers/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/InvalidateGenerator.hh"
InvalidateGenerator::InvalidateGenerator(const Params *p)
: DirectedGenerator(p)
diff --git a/src/cpu/directedtest/InvalidateGenerator.hh b/src/cpu/testers/directedtest/InvalidateGenerator.hh
index f9f2ed505..ab68c859f 100644
--- a/src/cpu/directedtest/InvalidateGenerator.hh
+++ b/src/cpu/testers/directedtest/InvalidateGenerator.hh
@@ -35,8 +35,8 @@
#ifndef __CPU_DIRECTEDTEST_INVALIDATEGENERATOR_HH__
#define __CPU_DIRECTEDTEST_INVALIDATEGENERATOR_HH__
-#include "cpu/directedtest/RubyDirectedTester.hh"
-#include "cpu/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/RubyDirectedTester.hh"
+#include "cpu/testers/directedtest/DirectedGenerator.hh"
#include "mem/protocol/InvalidateGeneratorStatus.hh"
#include "params/InvalidateGenerator.hh"
diff --git a/src/cpu/directedtest/RubyDirectedTester.cc b/src/cpu/testers/directedtest/RubyDirectedTester.cc
index 8f270627f..56352d14a 100644
--- a/src/cpu/directedtest/RubyDirectedTester.cc
+++ b/src/cpu/testers/directedtest/RubyDirectedTester.cc
@@ -27,8 +27,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "cpu/directedtest/RubyDirectedTester.hh"
-#include "cpu/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/RubyDirectedTester.hh"
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
#include "sim/sim_exit.hh"
diff --git a/src/cpu/directedtest/RubyDirectedTester.hh b/src/cpu/testers/directedtest/RubyDirectedTester.hh
index bd3989c04..bd3989c04 100644
--- a/src/cpu/directedtest/RubyDirectedTester.hh
+++ b/src/cpu/testers/directedtest/RubyDirectedTester.hh
diff --git a/src/cpu/directedtest/RubyDirectedTester.py b/src/cpu/testers/directedtest/RubyDirectedTester.py
index af1970594..af1970594 100644
--- a/src/cpu/directedtest/RubyDirectedTester.py
+++ b/src/cpu/testers/directedtest/RubyDirectedTester.py
diff --git a/src/cpu/directedtest/SConscript b/src/cpu/testers/directedtest/SConscript
index 1afa15984..1afa15984 100644
--- a/src/cpu/directedtest/SConscript
+++ b/src/cpu/testers/directedtest/SConscript
diff --git a/src/cpu/directedtest/SeriesRequestGenerator.cc b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc
index a880cdc9d..5b6395f93 100644
--- a/src/cpu/directedtest/SeriesRequestGenerator.cc
+++ b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc
@@ -27,9 +27,9 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "cpu/directedtest/RubyDirectedTester.hh"
-#include "cpu/directedtest/DirectedGenerator.hh"
-#include "cpu/directedtest/SeriesRequestGenerator.hh"
+#include "cpu/testers/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/RubyDirectedTester.hh"
+#include "cpu/testers/directedtest/SeriesRequestGenerator.hh"
SeriesRequestGenerator::SeriesRequestGenerator(const Params *p)
: DirectedGenerator(p)
diff --git a/src/cpu/directedtest/SeriesRequestGenerator.hh b/src/cpu/testers/directedtest/SeriesRequestGenerator.hh
index 443bd4fc0..97b632a12 100644
--- a/src/cpu/directedtest/SeriesRequestGenerator.hh
+++ b/src/cpu/testers/directedtest/SeriesRequestGenerator.hh
@@ -35,8 +35,8 @@
#ifndef __CPU_DIRECTEDTEST_SERIESREQUESTGENERATOR_HH__
#define __CPU_DIRECTEDTEST_SERIESREQUESTGENERATOR_HH__
-#include "cpu/directedtest/RubyDirectedTester.hh"
-#include "cpu/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/RubyDirectedTester.hh"
#include "mem/protocol/SeriesRequestGeneratorStatus.hh"
#include "params/SeriesRequestGenerator.hh"
diff --git a/src/cpu/memtest/MemTest.py b/src/cpu/testers/memtest/MemTest.py
index 957de8088..957de8088 100644
--- a/src/cpu/memtest/MemTest.py
+++ b/src/cpu/testers/memtest/MemTest.py
diff --git a/src/cpu/memtest/SConscript b/src/cpu/testers/memtest/SConscript
index 61aa0969e..61aa0969e 100644
--- a/src/cpu/memtest/SConscript
+++ b/src/cpu/testers/memtest/SConscript
diff --git a/src/cpu/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc
index 7b3ed3166..7a8e4cc52 100644
--- a/src/cpu/memtest/memtest.cc
+++ b/src/cpu/testers/memtest/memtest.cc
@@ -38,7 +38,7 @@
#include "base/misc.hh"
#include "base/statistics.hh"
-#include "cpu/memtest/memtest.hh"
+#include "cpu/testers/memtest/memtest.hh"
#include "mem/mem_object.hh"
#include "mem/port.hh"
#include "mem/packet.hh"
diff --git a/src/cpu/memtest/memtest.hh b/src/cpu/testers/memtest/memtest.hh
index bb71da355..bb71da355 100644
--- a/src/cpu/memtest/memtest.hh
+++ b/src/cpu/testers/memtest/memtest.hh
diff --git a/src/cpu/rubytest/Check.cc b/src/cpu/testers/rubytest/Check.cc
index 33927ea0c..9ace655a8 100644
--- a/src/cpu/rubytest/Check.cc
+++ b/src/cpu/testers/rubytest/Check.cc
@@ -27,7 +27,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "cpu/rubytest/Check.hh"
+#include "cpu/testers/rubytest/Check.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "mem/ruby/system/Sequencer.hh"
#include "mem/ruby/system/System.hh"
diff --git a/src/cpu/rubytest/Check.hh b/src/cpu/testers/rubytest/Check.hh
index 6d41dfc59..1ce795a21 100644
--- a/src/cpu/rubytest/Check.hh
+++ b/src/cpu/testers/rubytest/Check.hh
@@ -32,7 +32,7 @@
#include <iostream>
-#include "cpu/rubytest/RubyTester.hh"
+#include "cpu/testers/rubytest/RubyTester.hh"
#include "mem/protocol/AccessModeType.hh"
#include "mem/protocol/TesterStatus.hh"
#include "mem/ruby/common/Address.hh"
diff --git a/src/cpu/rubytest/CheckTable.cc b/src/cpu/testers/rubytest/CheckTable.cc
index 1c3444736..728ad0303 100644
--- a/src/cpu/rubytest/CheckTable.cc
+++ b/src/cpu/testers/rubytest/CheckTable.cc
@@ -28,9 +28,9 @@
*/
#include "base/intmath.hh"
-#include "cpu/rubytest/Check.hh"
-#include "cpu/rubytest/CheckTable.hh"
-#include "cpu/rubytest/CheckTable.hh"
+#include "cpu/testers/rubytest/Check.hh"
+#include "cpu/testers/rubytest/CheckTable.hh"
+#include "cpu/testers/rubytest/CheckTable.hh"
CheckTable::CheckTable(int _num_cpu_sequencers, RubyTester* _tester)
: m_num_cpu_sequencers(_num_cpu_sequencers), m_tester_ptr(_tester)
diff --git a/src/cpu/rubytest/CheckTable.hh b/src/cpu/testers/rubytest/CheckTable.hh
index 5a4ead337..5a4ead337 100644
--- a/src/cpu/rubytest/CheckTable.hh
+++ b/src/cpu/testers/rubytest/CheckTable.hh
diff --git a/src/cpu/rubytest/RubyTester.cc b/src/cpu/testers/rubytest/RubyTester.cc
index 036e511bc..516d6ae40 100644
--- a/src/cpu/rubytest/RubyTester.cc
+++ b/src/cpu/testers/rubytest/RubyTester.cc
@@ -27,8 +27,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "cpu/rubytest/Check.hh"
-#include "cpu/rubytest/RubyTester.hh"
+#include "cpu/testers/rubytest/Check.hh"
+#include "cpu/testers/rubytest/RubyTester.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
diff --git a/src/cpu/rubytest/RubyTester.hh b/src/cpu/testers/rubytest/RubyTester.hh
index 2726a50d6..53341bce9 100644
--- a/src/cpu/rubytest/RubyTester.hh
+++ b/src/cpu/testers/rubytest/RubyTester.hh
@@ -34,7 +34,7 @@
#include <vector>
#include <string>
-#include "cpu/rubytest/CheckTable.hh"
+#include "cpu/testers/rubytest/CheckTable.hh"
#include "mem/mem_object.hh"
#include "mem/packet.hh"
#include "mem/ruby/common/DataBlock.hh"
diff --git a/src/cpu/rubytest/RubyTester.py b/src/cpu/testers/rubytest/RubyTester.py
index af37d2ff1..af37d2ff1 100644
--- a/src/cpu/rubytest/RubyTester.py
+++ b/src/cpu/testers/rubytest/RubyTester.py
diff --git a/src/cpu/rubytest/SConscript b/src/cpu/testers/rubytest/SConscript
index 9352dd793..9352dd793 100644
--- a/src/cpu/rubytest/SConscript
+++ b/src/cpu/testers/rubytest/SConscript
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index 46bef49c6..f707af36f 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -26,7 +26,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "cpu/rubytest/RubyTester.hh"
+#include "cpu/testers/rubytest/RubyTester.hh"
#include "mem/physical.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
#include "mem/ruby/system/RubyPort.hh"
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 74b6355e8..dd30835da 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -27,7 +27,7 @@
*/
#include "base/str.hh"
-#include "cpu/rubytest/RubyTester.hh"
+#include "cpu/testers/rubytest/RubyTester.hh"
#include "mem/protocol/CacheMsg.hh"
#include "mem/protocol/Protocol.hh"
#include "mem/protocol/Protocol.hh"
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 19:33:54 +0000