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-rw-r--r--src/arch/alpha/ipr.hh9
-rw-r--r--src/arch/alpha/isa/decoder.isa8
2 files changed, 11 insertions, 6 deletions
diff --git a/src/arch/alpha/ipr.hh b/src/arch/alpha/ipr.hh
index 17518c0fe..51c1489b8 100644
--- a/src/arch/alpha/ipr.hh
+++ b/src/arch/alpha/ipr.hh
@@ -218,6 +218,15 @@ namespace AlphaISA
NumInternalProcRegs // number of IPR registers
};
+ inline bool IprIsWritable(int index)
+ {
+ return index < minReadOnlyIpr || index > maxReadOnlyIpr;
+ }
+
+ inline bool IprIsReadable(int index)
+ {
+ return index < minWriteOnlyIpr || index > maxWriteOnlyIpr;
+ }
extern md_ipr_names MiscRegIndexToIpr[NumInternalProcRegs];
extern int IprToMiscRegIndex[MaxInternalProcRegs];
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 0cbe38ceb..550aa62a3 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -746,9 +746,7 @@ decode OPCODE default Unknown::unknown() {
format HwMoveIPR {
1: hw_mfpr({{
int miscRegIndex = IprToMiscRegIndex[ipr_index];
- if(miscRegIndex < 0 ||
- (miscRegIndex >= MinWriteOnlyIpr &&
- miscRegIndex <= MaxWriteOnlyIpr))
+ if(miscRegIndex < 0 || !IprIsReadable(miscRegIndex))
fault = new UnimplementedOpcodeFault;
else
Ra = xc->readMiscRegWithEffect(miscRegIndex, fault);
@@ -761,9 +759,7 @@ decode OPCODE default Unknown::unknown() {
format HwMoveIPR {
1: hw_mtpr({{
int miscRegIndex = IprToMiscRegIndex[ipr_index];
- if(miscRegIndex < 0 ||
- (miscRegIndex >= MinReadOnlyIpr &&
- miscRegIndex <= MaxWriteOnlyIpr))
+ if(miscRegIndex < 0 || !IprIsWritable(miscRegIndex))
fault = new UnimplementedOpcodeFault;
else
xc->setMiscRegWithEffect(miscRegIndex, Ra);