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-rw-r--r--util/tlm/README105
-rw-r--r--util/tlm/SConstruct (renamed from util/tlm/examples/master_port/SConstruct)65
-rw-r--r--util/tlm/conf/tgen.cfg (renamed from util/tlm/examples/slave_port/tgen.cfg)0
-rw-r--r--util/tlm/conf/tlm_elastic_slave.py (renamed from util/tlm/examples/slave_port/tlm_elastic.py)6
-rw-r--r--util/tlm/conf/tlm_master.py (renamed from util/tlm/examples/master_port/tlm.py)0
-rw-r--r--util/tlm/conf/tlm_slave.py (renamed from util/tlm/examples/slave_port/tlm.py)2
-rw-r--r--util/tlm/examples/common/SConscript43
-rw-r--r--util/tlm/examples/master_port/SConscript44
-rw-r--r--util/tlm/examples/slave_port/SConscript44
-rwxr-xr-x[-rw-r--r--]util/tlm/run_gem5_fs.sh (renamed from util/tlm/examples/slave_port/run_gem5.sh)6
-rw-r--r--util/tlm/src/SConscript (renamed from util/tlm/examples/slave_port/SConstruct)56
-rw-r--r--util/tlm/src/master_transactor.cc (renamed from util/tlm/master_transactor.cc)0
-rw-r--r--util/tlm/src/master_transactor.hh (renamed from util/tlm/master_transactor.hh)0
-rw-r--r--util/tlm/src/sc_ext.cc (renamed from util/tlm/sc_ext.cc)0
-rw-r--r--util/tlm/src/sc_ext.hh (renamed from util/tlm/sc_ext.hh)0
-rw-r--r--util/tlm/src/sc_master_port.cc (renamed from util/tlm/sc_master_port.cc)0
-rw-r--r--util/tlm/src/sc_master_port.hh (renamed from util/tlm/sc_master_port.hh)6
-rw-r--r--util/tlm/src/sc_mm.cc (renamed from util/tlm/sc_mm.cc)0
-rw-r--r--util/tlm/src/sc_mm.hh (renamed from util/tlm/sc_mm.hh)0
-rw-r--r--util/tlm/src/sc_peq.hh (renamed from util/tlm/sc_peq.hh)0
-rw-r--r--util/tlm/src/sc_slave_port.cc (renamed from util/tlm/sc_slave_port.cc)0
-rw-r--r--util/tlm/src/sc_slave_port.hh (renamed from util/tlm/sc_slave_port.hh)0
-rw-r--r--util/tlm/src/sim_control.cc (renamed from util/tlm/sim_control.cc)0
-rw-r--r--util/tlm/src/sim_control.hh (renamed from util/tlm/sim_control.hh)0
-rw-r--r--util/tlm/src/sim_control_if.hh (renamed from util/tlm/sim_control_if.hh)0
-rw-r--r--util/tlm/src/slave_transactor.cc (renamed from util/tlm/slave_transactor.cc)0
-rw-r--r--util/tlm/src/slave_transactor.hh (renamed from util/tlm/slave_transactor.hh)0
27 files changed, 247 insertions, 130 deletions
diff --git a/util/tlm/README b/util/tlm/README
index bcaec69d1..6fd353cb0 100644
--- a/util/tlm/README
+++ b/util/tlm/README
@@ -49,29 +49,32 @@ once in order to run a gem5 simulation from within an SystemC environment.
II. Files
=========
- sc_slave_port.{cc,hh} -- Implements SCSlavePort
- sc_master_port.{cc,hh} -- Implements SCMasterPort
- sc_mm.{cc,hh} -- Implementation of a TLM memory manager
- sc_ext.{cc,hh} -- TLM extension that carries a gem5 packet
- sc_peq.{cc,hh} -- TLM PEQ for scheduling gem5 events
- sim_control.{cc,hh} -- Implements Gem5SimControl
- slave_transactor.{cc,hh} -- Implements Gem5SlaveTransactor
- master_transactor.{cc,hh} -- Implements Gem5MasterTransactor
-
- example/common/cli_parser.{cc,hh} -- Simple cli argument parser
- example/common/report_hanlder.{cc,hh} -- Custom SystemC report handler
-
- example/slave_port/main.cc -- demonstration of the slave port
- example/slave_port/sc_target.{cc,hh} -- an example TLM LT/AT memory module
- example/slave_port/tlm.py -- simple gem5 configuration
- example/slave_port/tlm_elastic.py -- gem5 configuration with an elastic
- trace replayer
- example/slave_port/tgen.cfg -- elastic traceplayer configuration
-
- example/master_port/main.cc -- demonstration of the master port
- example/master_port/traffic_generator.{cc/hh}
+ src/sc_slave_port.{cc,hh} -- Implements SCSlavePort
+ src/sc_master_port.{cc,hh} -- Implements SCMasterPort
+ src/sc_mm.{cc,hh} -- Implementation of a TLM memory manager
+ src/sc_ext.{cc,hh} -- TLM extension that carries a gem5 packet
+ src/sc_peq.{cc,hh} -- TLM PEQ for scheduling gem5 events
+ src/sim_control.{cc,hh} -- Implements Gem5SimControl
+ src/slave_transactor.{cc,hh} -- Implements Gem5SlaveTransactor
+ src/master_transactor.{cc,hh} -- Implements Gem5MasterTransactor
+
+ examples/common/cli_parser.{cc,hh} -- Simple cli argument parser
+ examples/common/report_hanlder.{cc,hh} -- Custom SystemC report handler
+
+ examples/slave_port/main.cc -- demonstration of the slave port
+ examples/slave_port/sc_target.{cc,hh} -- an example TLM LT/AT memory module
+
+ examples/master_port/main.cc -- demonstration of the master port
+ examples/master_port/traffic_generator.{cc/hh}
-- an example traffic generator module
- example/master_port/tlm.py -- simple gem5 configuration
+
+ conf/tlm_slave.py -- simple gem5 configuration connecting to a
+ SytemC/TLM slave module
+ conf/tlm_elastic_slave.py -- gem5 configuration with an elastic trace
+ replayer
+ conf/tlm_master.py -- simple gem5 configuration connecting to a
+ SytemC/TLM master module
+ conf/tgen.cfg -- trace generator configuration
Other Files will be used from utils/systemc example:
@@ -98,56 +101,36 @@ Note: For MAC / OSX this command should be used:
> scons --with-cxx-config --without-python --without-tcmalloc \
> build/ARM/libgem5_opt.dylib
-Set a proper LD_LIBRARY_PATH e.g. for bash:
-> export LD_LIBRARY_PATH="$LD_LIBRARY_PATH:/path/to/gem5/build/ARM/"
-
-or for MAC / OSX:
-> export DYLD_LIBRARY_PATH="$DYLD_LIBRARY_PATH:/path/to/gem5/build/ARM/"
-
-The build system finds your SystemC installation using pkg-config. Make sure
-that pkg-config is installed and your systemc.pc is within your
-PKG_CONFIG_PATH. You can add SystemC to the PKG_CONFIG_PATH using the following
-command:
-> export PKG_CONFIG_PATH="/path/to/systemc/lib-<arch>/pkgconfig/:$PKG_CONFIG_PATH"
-
-To build one of the examples:
+To build all sources of the SystemC binding and the examples simply run scons:
-> cd examples/{master,slave}_port
> scons
-> cd ../../
IV. Simple Examples
===================
-> cd examples/{master,slave}_port
-
In order to run our example simulation, we first need to create a config.ini
that represents the gem5 configuration. We do so by starting gem5 with the
desired python configuration script.
-> ../../../../build/ARM/gem5.opt ./tlm.py
+> ../../build/ARM/gem5.opt conf/tlm_{master,slave}.py
The message "fatal: Can't find port handler type 'tlm_{master,slave}'" is okay.
The configuration will be stored in the m5out/ directory
-The build step creates a binary gem5.opt.sc in the example directory. It can
-now be used to load in the generated configuration file from the previous
-normal gem5 run.
+The build step creates a binary 'gem5.sc' for each example in the
+build/examples/{master|slave}_port directories. It can now be used to load in
+the generated configuration file from the previous normal gem5 run.
Try:
-> ./gem5.opt.sc m5out/config.ini -e 1000000
+> build/examples/{master,slave}_port/gem5.sc m5out/config.ini -e 1000000
It should run a simulation for 1us.
To see more information what happens inside the TLM modules use the -v flag:
-> ./gem5.opt.sc m5out/config.ini -e 1000000 -v
-
-To see more information about the port coupling use:
-
-> ./gem5.opt.sc m5out/config.ini -e 1000000 -d ExternalPort
+> build/{master,slave}_port/gem5.sc m5out/config.ini -e 1000000 -v
V. Full System Setup
@@ -156,13 +139,11 @@ V. Full System Setup
Apart from the simple examples, there is a full system example that uses
the gem5-to-TLM bridge.
->cd examples/slave_port
-
Build gem5 as described in Section III. Then, make a config file for the
C++-configured gem5 using normal gem5
-> ../../../../build/ARM/gem5.opt ../../../../configs/example/fs.py \
- --tlm-memory=transactor --cpu-type=timing --num-cpu=1 \
+> ../../build/ARM/gem5.opt ../../configs/example/fs.py \
+ --tlm-memory=transactor --cpu-type=TimingSimpleCPU --num-cpu=1 \
--mem-type=SimpleMemory --mem-size=512MB --mem-channels=1 --caches \
--l2cache --machine-type=VExpress_EMM \
--dtb-filename=vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb \
@@ -172,17 +153,17 @@ C++-configured gem5 using normal gem5
The message "fatal: Can't find port handler type 'tlm_slave'" is okay.
The configuration will be stored in the m5out/ directory
-The binary 'gem5.opt.sc' can now be used to load in the generated config
-file from the previous normal gem5 run.
+The binary 'build/examples/slave_port/gem5.sc' can now be used to load in the
+generated config file from the previous normal gem5 run.
Try:
-> ./gem5.opt.sc m5out/config.ini -o 2147483648
+> build/examples/slave_port/gem5.sc m5out/config.ini -o 2147483648
The parameter -o specifies the begining of the memory region (0x80000000).
The system should boot now.
-For convenience a run_gem5.sh file holds all those commands
+For convenience a run_gem5_fs.sh file holds all those commands
VI. Elastic Trace Setup
@@ -199,13 +180,13 @@ For more information on elastic traces please refer to:
IEEE International Conference on Embedded Computer Systems Architectures
Modeling and Simulation (SAMOS), July, 2016, Samos Island, Greece.
-Similar IV. the simulation can be set up with this command:
+Similar to IV. the simulation can be set up with this command:
-> ../../../../build/ARM/gem5.opt ./tlm_elastic.py
+> ../../build/ARM/gem5.opt ./conf/tlm_elastic_slave.py
Then:
-> ./gem5.opt.sc m5out/config.ini
+> build/examples/slave_port/gem5.sc m5out/config.ini
VII. Knwon issues
@@ -214,4 +195,6 @@ VII. Knwon issues
* For some toolchains, compiling libgem5 with tcmalloc leads to errors
('tcmalloc Attempt to free invalid pointer xxx') when linking libgem5 into a
SystemC application.
-* When SystemC was build with --enable-pthreads, SystemC applications linked
+* When SystemC is build with pthread support enabled, the binding of gem5 to
+ SystemC breaks. When gem5 is linked to a SystemC application, gem5's usage
+ of thread local storage results in a segfault.
diff --git a/util/tlm/examples/master_port/SConstruct b/util/tlm/SConstruct
index a896a34e4..906094c7d 100644
--- a/util/tlm/examples/master_port/SConstruct
+++ b/util/tlm/SConstruct
@@ -33,46 +33,69 @@
# Authors: Christian Menard
import os
+import sys
+
gem5_arch = 'ARM'
gem5_variant = 'opt'
#gem5_variant = 'debug'
-gem5_root = '#../../../..'
-
-target = 'gem5.' + gem5_variant + '.sc'
+gem5_root = Dir('#../..').srcnode().abspath
env = Environment()
-# Import PKG_CONFIG_PATH from the external environment
-if os.environ.has_key('PKG_CONFIG_PATH'):
- env['ENV']['PKG_CONFIG_PATH'] = os.environ['PKG_CONFIG_PATH']
+#Make the gem5 root available in SConscripts
+env['GEM5_ROOT'] = gem5_root
-# search for SystemC
-env.ParseConfig('pkg-config --cflags --libs systemc')
+shlibsuffix = env['SHLIBSUFFIX']
# add include dirs
env.Append(CPPPATH=[gem5_root + '/build/' + gem5_arch,
gem5_root + '/util/systemc',
- gem5_root + '/util/tlm',
- '../common'])
-
-env.Append(LIBS=['gem5_' + gem5_variant])
-env.Append(LIBPATH=[gem5_root + '/build/' + gem5_arch])
+ gem5_root + '/ext/systemc/src',
+ '#src',
+ '#examples/common',
+ ])
env.Append(CXXFLAGS=['-std=c++11',
'-DSC_INCLUDE_DYNAMIC_PROCESSES',
- '-DTRACING_ON'])
+ '-DTRACING_ON',
+ ])
if gem5_variant == 'debug':
env.Append(CXXFLAGS=['-g', '-DDEBUG'])
-src_systemc = [gem5_root + '/util/systemc/sc_gem5_control.cc',
- gem5_root + '/util/systemc/sc_logger.cc',
- gem5_root + '/util/systemc/sc_module.cc',
- gem5_root + '/util/systemc/stats.cc']
+deps = [] # keep track of all dependencies required for building the binaries
+
+deps += SConscript('src/SConscript', variant_dir='build/tlm', exports='env')
+
+deps += SConscript('examples/common/SConscript',
+ variant_dir='build/examples/common',
+ exports=['env'])
+
+# the SystemC SConscript makes certain assumptions, we need to fulfill these
+# assumptions before calling the SConscript.
+main = env
+sys.path.append(gem5_root + '/src/python')
+AddOption('--no-colors', dest='use_colors', action='store_false',
+ help="Don't add color to abbreviated scons output")
+
+SConscript(gem5_root + '/ext/systemc/SConscript',
+ variant_dir='build/systemc',
+ exports='main')
+
+# By adding libraries as dependencies instead of using LIBS, we avoid that
+# the user needs to set the LD_LIBRARY_PATH
+deps.append(File('build/systemc/libsystemc' + shlibsuffix))
+deps.append(File(os.path.join(gem5_root, 'build', gem5_arch,
+ 'libgem5_' + gem5_variant + shlibsuffix)))
+
+ex_master = SConscript('examples/master_port/SConscript',
+ variant_dir='build/examples/master_port',
+ exports=['env', 'deps'])
-src_tlm = Glob(gem5_root + '/util/tlm/*.cc')
-src_main = Glob('*.cc') + Glob('../common/*.cc')
+ex_slave = SConscript('examples/slave_port/SConscript',
+ variant_dir='build/examples/slave_port',
+ exports=['env', 'deps'])
-main = env.Program(target, src_systemc + src_tlm + src_main)
+Default(ex_master + ex_slave)
diff --git a/util/tlm/examples/slave_port/tgen.cfg b/util/tlm/conf/tgen.cfg
index e341d8574..e341d8574 100644
--- a/util/tlm/examples/slave_port/tgen.cfg
+++ b/util/tlm/conf/tgen.cfg
diff --git a/util/tlm/examples/slave_port/tlm_elastic.py b/util/tlm/conf/tlm_elastic_slave.py
index 8930e2e1b..c2dd9e2ab 100644
--- a/util/tlm/examples/slave_port/tlm_elastic.py
+++ b/util/tlm/conf/tlm_elastic_slave.py
@@ -36,7 +36,7 @@ import optparse
from m5.objects import *
from m5.util import addToPath, fatal
-addToPath('../../../../configs/common/')
+addToPath('../../../configs/common/')
from Caches import *
@@ -106,8 +106,8 @@ system.physmem = SimpleMemory() # This must be instantiated, even if not needed
# Create a external TLM port:
system.tlm = ExternalSlave()
system.tlm.addr_ranges = [AddrRange('512MB')]
-system.tlm.port_type = "tlm"
-system.tlm.port_data = "memory"
+system.tlm.port_type = "tlm_slave"
+system.tlm.port_data = "transactor"
# Connect everything:
system.membus = SystemXBar()
diff --git a/util/tlm/examples/master_port/tlm.py b/util/tlm/conf/tlm_master.py
index 0b017a6d1..0b017a6d1 100644
--- a/util/tlm/examples/master_port/tlm.py
+++ b/util/tlm/conf/tlm_master.py
diff --git a/util/tlm/examples/slave_port/tlm.py b/util/tlm/conf/tlm_slave.py
index ed4db4047..ebf403fcb 100644
--- a/util/tlm/examples/slave_port/tlm.py
+++ b/util/tlm/conf/tlm_slave.py
@@ -56,7 +56,7 @@ from m5.objects import *
system = System()
system.membus = IOXBar(width = 16)
system.physmem = SimpleMemory() # This must be instanciated, even if not needed
-system.cpu = TrafficGen(config_file = "tgen.cfg")
+system.cpu = TrafficGen(config_file = "conf/tgen.cfg")
system.clk_domain = SrcClockDomain(clock = '1.5GHz',
voltage_domain = VoltageDomain(voltage = '1V'))
diff --git a/util/tlm/examples/common/SConscript b/util/tlm/examples/common/SConscript
new file mode 100644
index 000000000..8f83d523b
--- /dev/null
+++ b/util/tlm/examples/common/SConscript
@@ -0,0 +1,43 @@
+#!python
+
+# Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Christian Menard
+
+Import('env')
+
+env = env.Clone()
+
+objs = []
+objs += env.Object('cli_parser.cc')
+objs += env.Object('report_handler.cc')
+
+Return('objs')
diff --git a/util/tlm/examples/master_port/SConscript b/util/tlm/examples/master_port/SConscript
new file mode 100644
index 000000000..b6caa8a77
--- /dev/null
+++ b/util/tlm/examples/master_port/SConscript
@@ -0,0 +1,44 @@
+#!python
+
+# Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Christian Menard
+
+Import('env')
+Import('deps')
+
+env = env.Clone()
+
+src = [File('main.cc'), File('traffic_generator.cc')]
+
+bin = env.Program('gem5.sc', src + deps)
+
+Return('bin')
diff --git a/util/tlm/examples/slave_port/SConscript b/util/tlm/examples/slave_port/SConscript
new file mode 100644
index 000000000..3c7d71d6b
--- /dev/null
+++ b/util/tlm/examples/slave_port/SConscript
@@ -0,0 +1,44 @@
+#!python
+
+# Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Christian Menard
+
+Import('env')
+Import('deps')
+
+env = env.Clone()
+
+src = [File('main.cc'), File('sc_target.cc')]
+
+bin = env.Program('gem5.sc', src + deps)
+
+Return('bin')
diff --git a/util/tlm/examples/slave_port/run_gem5.sh b/util/tlm/run_gem5_fs.sh
index fd14689b9..3dd18a1b1 100644..100755
--- a/util/tlm/examples/slave_port/run_gem5.sh
+++ b/util/tlm/run_gem5_fs.sh
@@ -36,9 +36,9 @@ RCol='\e[0m'; # Text Reset
BGre='\e[1;31m';
echo -e "\n${BGre}Create gem5 Configuration${RCol}\n"
-../../../../build/ARM/gem5.opt ../../../../configs/example/fs.py \
+../../build/ARM/gem5.opt ../../configs/example/fs.py \
--tlm-memory=transactor \
---cpu-type=timing \
+--cpu-type=TimingSimpleCPU \
--num-cpu=1 \
--mem-type=SimpleMemory \
--mem-size=512MB \
@@ -50,4 +50,4 @@ echo -e "\n${BGre}Create gem5 Configuration${RCol}\n"
echo -e "\n${BGre}Run gem5 ${RCol}\n"
-time ./gem5.opt.sc m5out/config.ini -o 2147483648
+time ./build/examples/slave_port/gem5.sc m5out/config.ini -o 2147483648
diff --git a/util/tlm/examples/slave_port/SConstruct b/util/tlm/src/SConscript
index a896a34e4..76300df79 100644
--- a/util/tlm/examples/slave_port/SConstruct
+++ b/util/tlm/src/SConscript
@@ -32,47 +32,27 @@
#
# Authors: Christian Menard
-import os
+Import('env')
-gem5_arch = 'ARM'
-gem5_variant = 'opt'
-#gem5_variant = 'debug'
+env = env.Clone()
-gem5_root = '#../../../..'
+gem5_root = env['GEM5_ROOT']
-target = 'gem5.' + gem5_variant + '.sc'
+systemc_src = []
+systemc_src += Install('.', gem5_root + '/util/systemc/sc_gem5_control.cc'),
+systemc_src += Install('.', gem5_root + '/util/systemc/sc_logger.cc'),
+systemc_src += Install('.', gem5_root + '/util/systemc/sc_module.cc'),
+systemc_src += Install('.', gem5_root + '/util/systemc/stats.cc'),
-env = Environment()
+tlm_src = []
+tlm_src += [File('master_transactor.cc')]
+tlm_src += [File('sc_ext.cc')]
+tlm_src += [File('sc_master_port.cc')]
+tlm_src += [File('sc_mm.cc')]
+tlm_src += [File('sc_slave_port.cc')]
+tlm_src += [File('sim_control.cc')]
+tlm_src += [File('slave_transactor.cc')]
-# Import PKG_CONFIG_PATH from the external environment
-if os.environ.has_key('PKG_CONFIG_PATH'):
- env['ENV']['PKG_CONFIG_PATH'] = os.environ['PKG_CONFIG_PATH']
+tlm = env.Library('gem5_tlm', tlm_src + systemc_src)
-# search for SystemC
-env.ParseConfig('pkg-config --cflags --libs systemc')
-
-# add include dirs
-env.Append(CPPPATH=[gem5_root + '/build/' + gem5_arch,
- gem5_root + '/util/systemc',
- gem5_root + '/util/tlm',
- '../common'])
-
-env.Append(LIBS=['gem5_' + gem5_variant])
-env.Append(LIBPATH=[gem5_root + '/build/' + gem5_arch])
-
-env.Append(CXXFLAGS=['-std=c++11',
- '-DSC_INCLUDE_DYNAMIC_PROCESSES',
- '-DTRACING_ON'])
-
-if gem5_variant == 'debug':
- env.Append(CXXFLAGS=['-g', '-DDEBUG'])
-
-src_systemc = [gem5_root + '/util/systemc/sc_gem5_control.cc',
- gem5_root + '/util/systemc/sc_logger.cc',
- gem5_root + '/util/systemc/sc_module.cc',
- gem5_root + '/util/systemc/stats.cc']
-
-src_tlm = Glob(gem5_root + '/util/tlm/*.cc')
-src_main = Glob('*.cc') + Glob('../common/*.cc')
-
-main = env.Program(target, src_systemc + src_tlm + src_main)
+Return('tlm')
diff --git a/util/tlm/master_transactor.cc b/util/tlm/src/master_transactor.cc
index 9e8c2ffec..9e8c2ffec 100644
--- a/util/tlm/master_transactor.cc
+++ b/util/tlm/src/master_transactor.cc
diff --git a/util/tlm/master_transactor.hh b/util/tlm/src/master_transactor.hh
index 242c712e7..242c712e7 100644
--- a/util/tlm/master_transactor.hh
+++ b/util/tlm/src/master_transactor.hh
diff --git a/util/tlm/sc_ext.cc b/util/tlm/src/sc_ext.cc
index 439e1ca15..439e1ca15 100644
--- a/util/tlm/sc_ext.cc
+++ b/util/tlm/src/sc_ext.cc
diff --git a/util/tlm/sc_ext.hh b/util/tlm/src/sc_ext.hh
index 970a1b73d..970a1b73d 100644
--- a/util/tlm/sc_ext.hh
+++ b/util/tlm/src/sc_ext.hh
diff --git a/util/tlm/sc_master_port.cc b/util/tlm/src/sc_master_port.cc
index 630243359..630243359 100644
--- a/util/tlm/sc_master_port.cc
+++ b/util/tlm/src/sc_master_port.cc
diff --git a/util/tlm/sc_master_port.hh b/util/tlm/src/sc_master_port.hh
index a1ab3a8f2..f99c744e8 100644
--- a/util/tlm/sc_master_port.hh
+++ b/util/tlm/src/sc_master_port.hh
@@ -40,9 +40,9 @@
#include <systemc>
#include <tlm>
-#include <mem/external_master.hh>
-#include <sc_peq.hh>
-#include <sim_control.hh>
+#include "mem/external_master.hh"
+#include "sc_peq.hh"
+#include "sim_control.hh"
namespace Gem5SystemC
{
diff --git a/util/tlm/sc_mm.cc b/util/tlm/src/sc_mm.cc
index f5c07392c..f5c07392c 100644
--- a/util/tlm/sc_mm.cc
+++ b/util/tlm/src/sc_mm.cc
diff --git a/util/tlm/sc_mm.hh b/util/tlm/src/sc_mm.hh
index 81316e7f6..81316e7f6 100644
--- a/util/tlm/sc_mm.hh
+++ b/util/tlm/src/sc_mm.hh
diff --git a/util/tlm/sc_peq.hh b/util/tlm/src/sc_peq.hh
index 386142b72..386142b72 100644
--- a/util/tlm/sc_peq.hh
+++ b/util/tlm/src/sc_peq.hh
diff --git a/util/tlm/sc_slave_port.cc b/util/tlm/src/sc_slave_port.cc
index dcf7c5d95..dcf7c5d95 100644
--- a/util/tlm/sc_slave_port.cc
+++ b/util/tlm/src/sc_slave_port.cc
diff --git a/util/tlm/sc_slave_port.hh b/util/tlm/src/sc_slave_port.hh
index 6f8f6a633..6f8f6a633 100644
--- a/util/tlm/sc_slave_port.hh
+++ b/util/tlm/src/sc_slave_port.hh
diff --git a/util/tlm/sim_control.cc b/util/tlm/src/sim_control.cc
index a96daf2c8..a96daf2c8 100644
--- a/util/tlm/sim_control.cc
+++ b/util/tlm/src/sim_control.cc
diff --git a/util/tlm/sim_control.hh b/util/tlm/src/sim_control.hh
index 399372c7f..399372c7f 100644
--- a/util/tlm/sim_control.hh
+++ b/util/tlm/src/sim_control.hh
diff --git a/util/tlm/sim_control_if.hh b/util/tlm/src/sim_control_if.hh
index b65e919d2..b65e919d2 100644
--- a/util/tlm/sim_control_if.hh
+++ b/util/tlm/src/sim_control_if.hh
diff --git a/util/tlm/slave_transactor.cc b/util/tlm/src/slave_transactor.cc
index d181156c6..d181156c6 100644
--- a/util/tlm/slave_transactor.cc
+++ b/util/tlm/src/slave_transactor.cc
diff --git a/util/tlm/slave_transactor.hh b/util/tlm/src/slave_transactor.hh
index 6a9c5e836..6a9c5e836 100644
--- a/util/tlm/slave_transactor.hh
+++ b/util/tlm/src/slave_transactor.hh